GB2042299A - Differential amplifier arrangement - Google Patents

Differential amplifier arrangement Download PDF

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Publication number
GB2042299A
GB2042299A GB8003467A GB8003467A GB2042299A GB 2042299 A GB2042299 A GB 2042299A GB 8003467 A GB8003467 A GB 8003467A GB 8003467 A GB8003467 A GB 8003467A GB 2042299 A GB2042299 A GB 2042299A
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GB
United Kingdom
Prior art keywords
amplifier
resistances
input
circuit
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8003467A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Priority to GB8003467A priority Critical patent/GB2042299A/en
Publication of GB2042299A publication Critical patent/GB2042299A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45479Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45928Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
    • H03F3/45968Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction
    • H03F3/45991Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction by using balancing means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3211Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16HGEARING
    • F16H7/00Gearings for conveying rotary motion by endless flexible members
    • F16H7/08Means for varying tension of belts, ropes, or chains
    • F16H2007/0802Actuators for final output members
    • F16H2007/081Torsion springs

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

An electric amplifier adapted to respond to an input signal of either polarity comprising a first differential amplifier OP1 which is arranged to drive through a load L a current whose value varies with the input but is independent of the load value, and a second differential amplifier OP2 arranged to maintain the ratio of the amplifier output potentials relative to a datum potential E at a predetermined value, so that by appropriate choice of the datum potential and the predetermined ratio value the available output potential swing with a given supply voltage can be maximised. Resistors R2, R3 set the predetermined ratio. <IMAGE>

Description

SPECIFICATION Electric amplifier circuits This invention relates to electric amplifier circuits.
The invention relates pa rticularly to electric amplifier circuits of the kind adapted to respond to an input signal of either polarity to produce an output signal of polarity corresponding to the input signal.
With known forms of such amplifier circuits power supplies of appreciably highervoltagethanthe required output are often required. It is an object of the present invention to provide such an electric amplifier circuit whereby this difficulty is alleviated.
According to the present invention there is provided an electric amplifier circuit comprising: a first differential amplifier; a pair of terminals to which an input is applied in operation; a connection between one input terminal and one of the inputs of the first amplifier; first and second resistances connected in series, in the order stated, between the output of the first amplifier and the other input terminal; a connection between the junction of said first and second resistances and the other input of the first amplifier; a second differential amplifier; a further terminal connected to one input of the second amplifier, to which furtherterminal a datum potential is applied in operation; a connection between the output of the second amplifier and the end of said second resistance nearer said other input terminal; third and fourth resistances connected in series in the order stated between the output of the first amplifier and the output of the second amplifier; and a connection between the junction of said third and fourth resistances and the other input of said second amplifier.
In an amplifier circuit according to the invention the magnitude and direction ofthe current in the first resistance is determined by the magnitude and polarity of the input signal. Thus, to supply a current output to a load from the circuit said first resistance may be constituted at least partly by the load.
Similarly the magnitude and polarity of voltage across the first and second resistances is determined by the magnitude and polarity of the input voltage and a voltage output may be supplied to a load from the circuit by connecting the load across at least part of the series combination of said first and second resistances.
As is further explained below, in operation of a circuit in accordance with the invention the ratio of the potentials at the outputs of the first and second amplifiers relative to the datum potential is equal to the ratio of the values of the third and fourth resistances. Thus, by suitably choosing the values of the third and fourth resistances and the datum potential, the potential swings tending to occuratthe amplifier outputs can be adapted to the voltages of the supplies available for the amplifiers. In one such arrangement, the ratio of the values of said third and fourth resistances is substantially equal to the ratio of the supply voltages for said first and second amplifiers respectively and each said amplifier is sup- plied from between lines maintained at substantially equal and opposite potentials with respect to said datum potential.In one particular such arrangement the amplifier supply voltages are substantially equal and the third and fourth resistances are of substantially equal value.
The amplifier supply voltages are normally such that the required datum potential is ground potential.
One electric amplifier circuit in accordance with the invention will now be described by way of example with reference to the accompanying drawing which is a diagram of the circuit.
Referring to the drawing, the circuit includes an operational amplifier OP1 having its non-inverting input connected to a terminal A, its output connected to a terminal C, and its inverting input connected to a terminal D, and via a resistor R1 to a terminal B. In operation an input signal voltage, which may be of either polarity is applied between the terminals A and B, and a load resistance Lto be supplied with a current having a magnitude and direction dependent on the input signal is connected between the terminals C and D.
The circuit further includes a second operational amplifier OP2 having its non-inverting input connected to a terminal E which is grounded, and its output connected to the terminal B. Across the series connection of the load L and the resistor R1, i.e. between the amplifier outputs, there are connected in series two further resistors R2 and R3 of equal value, and the junction between the resistors R2 and R3 is connected to the inverting input of the amplifier OP2.
The two amplifiers OP1 and OP2 are both energised from between lines maintained at nominally equal and opposite potentials +V and -V with respect to ground.
In operation, when an input voltage is applied between terminals A and B a potential of corresponding polarity is established between the output of amplifier OP1 and terminal B causing a current to pass through the load L and resistor R1. The voltage consequently developed across resistor R1 is fed back to the inverting input of the amplifier OP1, ensuring that the current is maintained constant for a constant input voltage.
Thus the amplifier OP1 together with the load L and resistor R1 operate in conventional manner two maintain a constant current through the load L for a given input voltage regardless of the resistance of the load, the value of the current being determined by the value of resistor R1.
When the resistance of the load L varies, the voltage developed across the load Ovaries but the amplifier OP2 maintains the junction between the resistors R2 and R3 at ground potential. Since the resistors R2 and R3 are of equal value the potentials at terminal C and terminal B are always equal and opposite relative to ground, as are the supply lines from which the amplifiers OP1 and OP2 are energised. The possible potential swings at the outputs of the amplifiers OP1 and OP2 for a given value of V are thus maximised. Consequently the load resistance may have a relatively high resistance for a given output current.
Since the current drawn by the non-inverting input of the amplifier OP2 is negligible, the potential applied to terminal E is conveniently produced from the supply for the amplifiers by means of a resistive potential divider.
It will be appreciated that the simple relatively low voltage supply arrangement required by the circuit is in itself a significant advantage. Furthermore, since the value of V for a given circuit performance may be lower than in known circuits, the circuit has the advantage over known circuits of lower power consumption and lower power dissipation so that com ponenttemperatures can more easily be kept within safe limits.
It will be appreciatedthatthe amplifierOP1 is preferably provided with means for nulling offset voltage, but this is not necessary in the case of amplifier OP2 since the effect of offset voltages thereon is negligible.
It will be understood that the action of the circuit is to swing the input signal relative to ground according to the value of the load Land that the input signal must therefore be isolated.
If the input voltage is too high for direct application to amplifier OP1, a potential divider (not shown) may be used to drop the voltage applied between terminals A and B to a suitable level.
To convert the circuit for use with a current input, a resistor (not shown) may be connected between terminals A and B.
If a voltage output instead of a current output is required from the circuit, this may be obtained from between terminals C and B with a fixed value resistor (not shown) connected between terminals C and D of appropriately chosen value relative to resistor R1.
One particular application of the circuit described by way of example is in an arrangement for measuring a bidirectional quantity, such as power.
It will be appreciated that in general terms the circuit operates to maintain the ratio of the potentials at terminals C and B relative to the potential at terminal E equal to the ratio of the values of the resistors R2 and R3.
In the circuit described by way of example the potential at terminal E and the values of resistances R2 and R3 are chosen to allow a maximum potential swing at the amplifier outputs with both amplifiers supplied from a common supply of tV. It will be appreciated that in other circuits in accordance with the invention the ratio of the values of resistors R2 and R3 and/or the potential at terminal E may be chosen differently. For example, with a circuit configuration as shown in the drawing, if the available supply voltages for amplifiers OP1 and OP2 are +2V and +V respectively the values of resistors R2 and R3 are suitably chosen to have a ratio of 2:1; and if the available supply voltage for each amplifier is +V the potential applied to terminal E is suitable +v/2.

Claims (8)

1. An electric amplifier circuit comprising: a first differential amplifier; a pair of terminals to which an input is applied in operation; a connection between one input terminal and one of the inputs of the first amplifier; first and second resistances connected in series, in the order stated, between the output of the first amplifier and the other input terminal; a connection between the junction of said first and second resistances and the other input of the first amplifier; a second differential amplifier; a further terminal connected to one input of the second amplifier, to which further terminal a datum potential is applied in operation; a connection between the output of the second amplifier and the end of said second resistance nearer said other input terminal; third and fourth resistances connected in series in the order stated between the output of the first amplifier and the output of the second amplifier; and a connection between the junction of said third and fourth resistances and the other input of said second amplifier.
2. A circuit according to Claim 1 wherein the ratio of the values of said third and fourth resistances is substantially equal to the ratio of the supply voltages for said first and second amplifiers respectively and each of said amplifier is supplied from between lines maintained at substantially equal and opposite potentials with respect to said datum potential.
3. A circuit according to Claim 2 wherein said third and fourth resistances are substantially equal and the supply voltages for said amplifiers are substantially equal.
4. A circuit according to any one of the preceding claims wherein said datum potential is ground potential.
5. A circuit according to any one of the preceding claims wherein said first resistance is constituted at least partly by a load of the amplifier circuit.
6. A circuit according to any one of Claims 1 to 5 wherein a load for the amplifier circuit is connected across at least part of the series combination of said first and second resistances.
7. A circuit according to any one of the preceding claims wherein said differential amplifiers are operational amplifiers.
8. An electric amplifier circuit substantially as hereinbefore described with reference to the accompanying drawing.
GB8003467A 1979-02-13 1980-02-01 Differential amplifier arrangement Withdrawn GB2042299A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8003467A GB2042299A (en) 1979-02-13 1980-02-01 Differential amplifier arrangement

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB7905104 1979-02-13
GB8003467A GB2042299A (en) 1979-02-13 1980-02-01 Differential amplifier arrangement

Publications (1)

Publication Number Publication Date
GB2042299A true GB2042299A (en) 1980-09-17

Family

ID=26270563

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8003467A Withdrawn GB2042299A (en) 1979-02-13 1980-02-01 Differential amplifier arrangement

Country Status (1)

Country Link
GB (1) GB2042299A (en)

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WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)