GB2039179A - Demodulator circuit - Google Patents
Demodulator circuit Download PDFInfo
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- GB2039179A GB2039179A GB7942100A GB7942100A GB2039179A GB 2039179 A GB2039179 A GB 2039179A GB 7942100 A GB7942100 A GB 7942100A GB 7942100 A GB7942100 A GB 7942100A GB 2039179 A GB2039179 A GB 2039179A
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- 230000035945 sensitivity Effects 0.000 claims abstract description 7
- 230000001105 regulatory effect Effects 0.000 claims description 34
- 230000001419 dependent effect Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 8
- 230000003044 adaptive effect Effects 0.000 description 6
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- 101000820240 Escherichia coli (strain K12) Uncharacterized protein YfiL Proteins 0.000 description 5
- 101000760434 Homo sapiens E3 ubiquitin-protein ligase UHRF2 Proteins 0.000 description 5
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- 101000758956 Paracoccus denitrificans Uncharacterized 22.9 kDa protein in nqo2 3'region Proteins 0.000 description 5
- 101000823678 Synechococcus sp. (strain PCC 6716) Uncharacterized 8.8 kDa protein in atpI 5'region Proteins 0.000 description 5
- 230000001427 coherent effect Effects 0.000 description 3
- 238000006073 displacement reaction Methods 0.000 description 3
- 230000003595 spectral effect Effects 0.000 description 3
- 230000002238 attenuated effect Effects 0.000 description 2
- 101001131592 Homo sapiens Periodic tryptophan protein 2 homolog Proteins 0.000 description 1
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- 238000001228 spectrum Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
- H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
- H03D3/24—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits
- H03D3/241—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits the oscillator being part of a phase locked loop
- H03D3/245—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits the oscillator being part of a phase locked loop using at least twophase detectors in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D1/00—Demodulation of amplitude-modulated oscillations
- H03D1/22—Homodyne or synchrodyne circuits
- H03D1/2245—Homodyne or synchrodyne circuits using two quadrature channels
- H03D1/2254—Homodyne or synchrodyne circuits using two quadrature channels and a phase locked loop
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
A demodulator circuit provided with a phase-locked loop and suitable for amplitude demodulation comprises a mixer stage (M) which multiplies the input signal (uE) by the output signal (uos) of a voltage- controlled oscillator (VCO), the control voltage of which is provided by the output voltage (uM) of the mixer stage (M) after being fed through a low-pass filter (TP, RF1). At least one of the parameters of the group comprising the amplitude of the output signal (ûos) of the voltage- controlled oscillator (VCO), the modulation sensitivity (kos) of the voltage- controlled oscillator (VCO), the voltage gain (kv, kv1) of the low-pass filter (TP, TP1) and the gain (kM, kM1) of the mixer stage (M, M1) is so varied in inverse proportion to the carrier amplitude (ûT) of the input signal (uE) that the product ( omega p) of the parameters and the carrier amplitude (uT) is maintained substantially constant for improving the signal to noise ratio. The input signal UE is amplitude demodulated at M2 and an output signal dependent on the carrier amplitude is derived via filters TPS, RF2. <IMAGE>
Description
SPECIFICATION
Demodulator circuit
The present invention relates to a demodulator circuit provided with a phase-locked loop.
According to the present invention, there is now provided a demodulator circuit provided with a phase-locked loop comprising input means to receive an input signal, a voltage-controlled oscillator to provide an oscillator signal, a mixer stage to receive the input signal and the oscillator output signal and to provide an intermediate signal proportional to the product of the input signal and the oscillator output signal, a low-pass filter to receive the intermediate signal and to provide a control voltage signal to the oscillator, and regulating means so to vary at least one of the parameters of the group comprising the amplitude of the oscillator output signal, the modulation sensitivity of the oscillator, the voltage gain of the low-pass filter and the gain of the mixer stage in inverse proportionality to the carrier amplitude of the input signal as to maintain the product of said parameters and the carrier amplitude substantially constant.
Embodiments of the present invention will now be more particularly described by way of example with reference to the accompanying drawings, in which:
Figure 1 illustrates a basic schematic block diagram of a known kind of demodulator circuit provided with a phase-locked loop,
Figure 2 illustrates a basic schematic block diagram of a further known kind of amplitude demodulator circuit provided with a phase-locked loop and means for recovering the carrier of the phase-locked loop.
Figure 3 illustrates a basic schematic block diagram of regulating means, of a-demodulator circuit embodying the present invention, for obtaining the carrier amplitude of the input signals,
Figure 4 illustrates a first refinement of the circuit illustrated by Fig. 3 in a demodulator circuit embodying the present invention and provided with means for regulating the amplitude of the output signal of a voltage-controlled oscillator thereof,
Figure 5 illustrates a second refinement of the circuit illustrated by Fig. 3 in a demodulator circuit embodying the present invention and provided with means for regulating the voltage gain of a low-pass filter thereof, and
Figure 6 illustrates a third refinement of the circuit illustrated by Fig. 3 in a demodulator circuit embodying the present invention and provided with means for regulating the gain of a mixer stage thereof.
Referring now first to Figs. 1 and 2 of the accompanying drawings for a discussion of the prior are and some of the problems entailed therey, it is known that a phase-locked loop (PLL) is a control system in which the instantaneous phase of a voltage-controlled oscillator VCO is applied to the instantaneous phase of an input signal (wixde-band PLL) or the phase of the spectral line of the carrier of the input signal (narrow-band PLL). Fig. 1 shows a block diagram of such a phase-locked loop operating without input signal limitation and comprising a mixer M, a voltage-controlled oscillator VCO, a low-pass filter TP and a regulating filter RF with low-pass properties used only in the narrow-band PLL.
Let UE be the input signal with u,(t) = UT sin(w,t + #(t) + fT) (1)
If uS, is the control voltage of the voltage-controlled oscillator and k05 is its modulation sensitivity, then one can state:
UE and u05 are multiplied in the mixer and one contains: UM(t) = kM UE(t) Uos(t)
With suitable dimensioning of the low-pass filter TP, the voltage at the sum frequency is suppressed and it follows::
In the narrow-band PLL, the oscillator phase of which is to follow only the spectral line of the input signal carrier, the regulating filter RF filters out all spectral components from UN apart from those at the lowest frequencies and, provided that the carrier frequency and oscillator frequency are sufficiently close together, one obtains
This equation can be solved exactly (Blanchard, A.; Phase Locked Loops, John Wiley & Sons,
New York, 1976, Chapter 10.1). It is found that a steady state solution is possible if the following is true:
One can therefore define
1 o"p = ITkMkvkosuosIuT. (7)
2 and it then follows from (6) that - |#T - Xos < Cop.
The parameter cop is therefore of joint decisive significance for the function of the phaselocked loop.
When solving equation (5) it is found that the following asymptotic values occur: (9) #T - Os (10) Cop From the last two equations, it is evident that the phase-locked loop under condition (8) makes the oscillator frequency follow the carrier frequency of the input signal and produces a fixed phase relationship between carrier phase and oscillator phase so that the phase locked loop is "locked onto" the carrier phase.
When carrier and oscillator frequencies are sufficiently close together, then the phase displacement between UE and u99 is almost 90 . The arguments of the angular functions in equations (4) and (5) must then numerically be much smaller than 1. One can therefore linearise these equations by substituting the angular function by their argument.
One then obtains:
By differentiating equation (12), one obtains the following differential equation Cop Ust(t) + Co p u,(t) = kos (#T - Co09). (1 3) k09 This is the equation of a low-pass filter with the limiting frequency xp/2sr. Together with the parameters of the low-pass filter TP and of the regulating filter RF, the magnitude Cop will therefore also influence the stability of the control loop.
In the wide-band phase-locked loop, the regulating filter RF is omitted. Its function is fulfilled by the low-pass filter TP. In the locked-on case, equation (4) or (1 1), respectively, after differentiation become: Cop ust(t) + Cop Ust(t) = {(CoT - #os) + # (t)). (1 4) k09 Here again, a clear low-pass behaviour is present with the limiting frequency Cop/2VT, which likewise influences the stability of the loop.By contrast with the narrow-band phase-locked loop, provided l(t)l is sufficiently small, the following asymptotic values however occur approximately: #os#T#T + #(t) (15) #T + #(t) - #os #os - #T + arcsin + (16) Cop In the wide-band phase-locked loop, by constrast with the narrow-band phase locked loop, the instantaneous phase of the VCO-signal thus adjusts to the instantaneous phase of the input signal and not to its carrier phase.For the locking-on of the wide-band phase-locked loop, the following limitation must be satisfied instead of (8): |#T - #as # #(t)| > #p. (17)
Apart from the just explained significance of #p for the locking-on behaviour and stability of the loop, this magnitude usually also plays a decisive role in the further processing of the signals obtained both in the wide-band phase locked loop and in the narrow-band phase-locked loop, three examples will be discussed to explain this.
It is known that the narrow-band phase-locked loop can be used as a phase-modulation demodulator, if the input signal is modulated by small phase displacements. Following equations (9) and (10), in the locked-on case when the voltage-controlled oscillator is tuned to the carrier frequency, an oscillator signal occurs
UoS(t) = ûos COS(#Tt + #) (18)
It then follows for the voltage uN(t) at the output of the low-pass filter TP that Cop sin sin - sin #(t). (19) k05 For values i0(t) 1, one can state by approximation Cop (20)
kos
It has thereby been shown on the one hand that the demodulated signal occurs at the lowpass filter output and on the other hand that the amplitude of the output signal is dependent direct upon cop.
It is known that the narrow-band phase-locked loop may also be used for synchronous demodulation of an amplitude-modulated signal. Fig. 2 shows a block diagram of such a demodulator.
The amplitude-modulated input signal may be represented by UE,AM(t) = ûT (1 + m(t)) sin(rt + FT) (21) where ||m(t)||#1. (22)
If the frequencies contained in the spectrum of m(t) do not fall below a minimum value frn#n > O and the regulating filter RF is suitably constructed, it is'possible according to equation (12) to derive a control signal which causes the voltage-controlled oscillator VCO to follow the carrier frequency of the input signal and sets the oscillator phase asymptotically to the value given by equation (10). The oscillator signal, in the locked-on case and with the oscillator frequency at rest being tuned to the carrier frequency, is then given as in equation (18).After phase displacement through 90 , one obtains from this a voltage uo(t) uo(t) = ûos sin(#t + #t). (23) uo(t) is multiplied by the input signal in a mixer stage to produce a mixer voltage
UM2(t) = kM2ûo5ûT (1 + m(t)) sin(#t + #) - #kM2U"osOT (1 + m(t)) (1 - cos(2#t + 2#T)). (24)
2
When the low-pass filter TP2 is so dimensioned that signals at frequencies near to 2fT are attenuated sufficiently whilst signals at frequencies in the low-frequency band are practically not attenuated, then the output of TP2 becomes UAM(t) =~kM2kv2ûosûT (1 + m(t)). (25)
2
The gains of the mixer stages M1 and M2 and of the low-pass filter units TP1 and TP2 are fixedly set. Therefore, a fixed relationship
can be defined, from which it follows that UAM(t) = kAM#p (1 + m(t)) (27)
Thus, the demodulated signal with a superimposed direct voltage is present at the output of the low-pass filter TP2. It is again evident that the amplitude of the output signal is dependent through Cop upon the carrier amplitude of the input signal.
It is known that a demodulation of a frequency-modulated can be achieved with the aid of a wide-band phase-locked loop. The circuit is presupposed to be as in Fig. 1 and without regulating filter RF. The output of the low-pass filter TP with the output voltage uN(t) is chosen to be the output of the demodulator circuit.
Now let the input signal be as in equation (1)
UE(t) = UT sin(w,t + +(t) + #). (28)
Then the information to be transmitted is contained in the time derivative of #fl.
According to equation (14), the following is true in the locked-on case and when the voltage controlled oscillator is tuned to the carrier frequency of the input signal:
1 1 ust(t) + ust(t) =~ #(t). (29) Cop k09 The voltage u5,(t) can thus be regarded as the output voltage of a low-pass filter, which is supplied with the input voltage f(t)/koS and the limiting frequency of which is wp/2sT. If Cop is sufficiently large, therefore, u5t(t) = uN(t) is the demodulated information which is not dependent upon the carrier amplitude of the input signal.Nevertheless, the influence of the carrier amplitude by way of the limiting frequency Cop is significant: if xp/2sr becomes smaller than #NF.m9s' then strong distortion of the information is to be expected.
The aforementioned examples show the significant influence of Cop on a satisfactory result of the circuit function.
The hitherto known technical solutions counter the dependence of the phase-locked loop on the carrier amplitude of the input signal by connecting a limiter-band pass filter in front of circuit stages processing angle-modulated signals.
Where a limiter is used, a highly selective filter must be still connected on its input side, since the limiter otherwise does not fulfil its amplitude-stabilizing function. A cause of intermodulation problems arises from the extreme non-linearity of the limiter. Finally, the limiter worsens the signal-noise ratio inside the phase-locked loop (Springet,, J.C. Simon, M.K.: An Analysis of the
Phase Coherent-Incorherent Output of the Band-pass Limiter, IEEE Trans. Comm. Techn., vol.
COM-19, No. 1, Febr. 1971, pp. 42-49). With amplitude-modulated signals, an element has hitherto been connected in front of the phase-locked loop for automatic gain control.
An amplitude regulation in front of the phase-locked loop has already been investigated (Blanchard, A.: Phase Locked Loops, John Wiley s Sons, New York, 1976, chapter 1 1.2.1 : Jaffee, R. Rechtin, E: Design and Performance of Phase-locked circuits capable of near-optimum perforance over a wide range of input signal and noise levels, IRE Trans. Inform. Theory, vol.
IT-1, pp. 66.76, Mar. 1955).
According to equation (29), the wide-band phase-locked loop frequency-modulation demodulator acts like a low-pass filter with the limiting frequency xp/27T.
A conventional frequency-modulation demodulator, when the signal-noise ratio at the input falls below the demodulator threshold value, worsens the signal-noise ratio at the output in such a manner that demodulation is no longer possible. An "adaptive" phase-locked loop demodulator utilizes the low-pass properties to reduce the threshold value under certain conditions.
The improvement in the threshold value takes place when the magnitude Cop is regulated or controlled as a function of UT as in the following manner. When the input amplitude falls below a predetermined value uTmjn, then cop should fall monotonically with ÛT. For UT > UTmin Cop should be equal to Cop0, where xpO is to be a minimum value for maintaining the system specification.
When ÛT thus falls below UTmin then the low-frequency bandwidth automatically becomes narrower, thereby also to reduce the low-frequency noise output. By dispensing with the lowfrequency information bandwidth, the signal-noise ratio at the output is thus improved. An adaptive demodulator consequently operates (with restricted information bandwidth) even when conventional demodulators fail. This behaviour is termed adaptive.
By the regulation or control of xp, a large dynamic range is retained. In principle, the adaptive demodulator operates also without regulation of control of Cop or Q. However, considerable stability problems could then arise.
Similar adaptive demodulators can be constructed for wide-band or narrow-band phase modulation.
Because an amplitude limitation on the input side of frequency-modulation or phasemodulation systems has hitherto always been considered necessary, the adaptive behaviour has so far remained unrecognized. A phase-locked loop regulation, according to the present invention and as now to be explained first with reference to Fig. 3, enables this concept to be utilized to the optimum.The expression
1 Cop = I-kMkOskvUnsIU'T, 2 which includes parameters of the phase-locked loop and of the carrier amplitude of the input signal, is maintained constant by at least one of the parameters kM, k09, kv or u09 being varied in inverse proportion to ÛT. To enable these parameters to be regulated or controlled in the correct manner, information about the magnitude u09 must be procured. This can be achieved basically by a coherent or an incoherent amplitude demodulation, which however must be carried out with sufficient selectivity so that an adjacent channel signal at the input does not falsify the information.
Fig. 3 shows the basic circuit diagram of such an amplitude-modulation demodulator circuit comprising the circuit group D of the mixer stage M2, of the low-pass filter TPS and of the regulating filter RF2. An input signal uE(t) is multiplied in the mixer stage M2 by p local oscillator signal u,O (t): uM2(t) = kM2ULO(t) UE(t) (30)
The low-pass filter TPS must be highly selective. Its bandwidth must be smaller than or equal to the high-frequency channel width. In this way, adjacent channel signals are prevented from making a contribution to the low-pass filter output signal uTpS(t).With
UE(t) = ûT (1 + m(t)) sin(Tt + +(t) + #) (31) and ULo(t) = û,O sin(#Tt + #Lo) (32) one then obtains UTps(t) = -kM2ksUTUL0 (1 + m(t)) cos(f(t) + #T~#Lo) (33)
2
This signal must be further processed in a selective regulating filter RF2 in such a manner that only the time-invariant component remains as an actuator or control signal URF2. This can be carried out, for example, by forming the root of the mean square value of the voltage (rmsvalue). It follows that
URF2 = -kM2kskRF2ûTûLO (34)
2
Thus, a magnitude proportional to UT has been found.
With a local oscillator LO running always synchronously with the input signal, the derivation of the magnitude proportional to UT would be more simple to form. Here the following applies: cos(#(t) + #T - #Lo)#1 (35) therefore
UTPS =~kM2ksûTûLo (1 + m(t)) (36)
2
By filtering with a regulating filter RF2 of sufficiently small bandwidth one obtains from the above
URF2 = kM2ksUTUL0knp2. (37)
2
The further processing of the signal now depends upon which of the parameters kM, kv, kos or O, is to be influenced.
For a control of the oscillator output voltage amplitude ûOS, a coherent amplitude-modulation demodulation may be used. Fig. 4 shows the block diagram of such a controlled phase-locked loop.
The units M1, TP1, RF1 and VCO form the actual phase-locked loop, for the function of which, a regulating amplifier RV may be regarded as belonging to the oscillator. The signal uos' 2 is phase-displaced through 90 from the signal uO9 #. In the locked-on case, therefore, a coherent amplitude-modulation demodulation is effected by units M2 and TPS. The unit RF2 provides the information for the control of the regulating amplifier. The target value of Cop can bre set by a voltage u9011.
A second possibility is the control of the gain in the low-frequency path of the phaselocked loop. This can be effected, for example by varying the voltage gain kvi in the low-pass unit TP1.
Here,
where UTP1 (w) is the low-pass output signal an UMI (o) is the low-pass input signal as a function of the angular frequency Co.
An increase in the modulation sensitivity k09 would likewise be carried out in the low frequency path by acting on the modulation amplifier in the voltage-controlled oscillator.
The modulation sensitivity k09 is defined by dxo5 k09:- (39)
dust where xoS(t) is the instantaneous angular frequency of the voltage-controlled oscillator and u5t(t) is its control voltage, provided Ust is modified sufficiently slowly.
Fig. 5 shows one possible block diagram with control of the voltage gain kv before tapping off un(t).
Here again the units M1, TP1, RF1 and VCO from the actual phase-locked loop. The multiplier M3 can be regarded as a low-frequency amplifier with variable gain and as belonging to the unit TP1. The amplitude-modulation demodulation is carried out as in the preceding circuit by the circuit block D. By difference therefrom, the information URp2 must, however, still be inverted by a divider block DIV. With a voltage Ussii, on then obtains a weighted reciprocal value of URF2 at the output of the divider. The thus obtained signal UR is of the form usoll UR=k (40)
By multiplying the voltages UTpl by UR in the mixer stage M3, the influence of UT on Cop is therefore eliminated. The mixer stage M4 can be left out if the amplitude-modulation information is not to be tapped off.
By the weighting of the signal UR by the voltage u951, a target value of Cop can be set.
Furthermore, the possibility exists of regulating the gain kM, of the mixer stage Ml. A circuit for this purpose is shown in Fig. 6. In this circuit, the output signal URp2 of the amplitudemodulation demodulator D is supplied to the mixer stage M1 for regulating its gain kMl. In the circuit shown in Fig. 6, the signal URF2 is likewise drawn upon for regulating the gain kM2 of the mixer stage M2 in the amplitude-modulation demodulator. The definition and significance of the mixer gain are apparent from equation (3).
Claims (10)
1. A demodulator circuit provided with a phase-locked loop comprising input means to receive an input signal, a voltage-controlled oscillator to provide an oscillator signal, a mixer stage to receive the input signal and the oscillator output signal and to provide an intermediate signal proportional to the product of the input signal and the oscillator output signal, a low pass filter to receive the intermediate signal and to provide a control voltage signal to the oscillator, and regulating means so to vary at least one of the parameters of the group comprising the amplitude of the oscillator output signal, the modulation sensitivity of the oscillator, the voltage gain of the low-pass filter and the gain of the mixer stage in inverse proportionality to the carrrier amplitude of the input signal as to maintain the product of said parameters and the carrier amplitude substantially constant.
2. A demodulator circuit as claimed in claim 1, the regulating means being provided with an amplitude-modulation demodulator circuit comprising a local oscillator to provide a local oscillator signal, a second mixer stage to receive the local oscillator signal and the input signal, a second low pass filter having input means coupled to output means of the second mixer stage, and a regulating filter having input means coupled to output means of the second low-pass filter and output means to provide a signal proportional to the carrier amplitude.
3. A demodulator circuit as claimed in claim 2, the regulating means comprising a regulating amplifier having input means coupled to output means of the voltage-controlled oscillator and to the output means of the second low pass filter, and means to receive the regulated output voltage of the regulating amplifier and to apply said output voltage shifted in phase through 90 to input means of the second mixer stage, for regulating the amplitude of the oscillator output signal.
4. A demodulator circuit as claimed in claim 2, the regulating means comprising a third mixer stage to multiply the output signal of the first-mentioned low-pass filter with the inverted output signal of the amplitude-modulation demodulator circuit, and means to apply the oscillator output signal shifted in phase through 90 to input means of the second mixer stage, for regulating said voltage gain.
5. A demodulator circuit as claimed in claim 2, the regulating means comprising a modulation amplifier in the voltage-controlled oscillator, the modulation amplifier having input means to receive the output signal of the amplitude-modulation demodulator circuit, for regulating said modulation sensitivity.
6. A modulator circuit as claimed in claim 2, the regulating means comprising means to couple the output signal of the amplitude-modulation demodulator circuit to input means of the first-mentioned mixer stage for regulation the gain thereof, and means to apply the oscillator output signal shifted in phase through 90 to input means of the second mixer stage.
7. A demodulator circuit substantially as hereinbefore described with reference to and as illustrated by Fig. 3 of the accompanying drawings.
8. A demodulator circuit as claimed in claim 7 and substantially as hereinbefore described with reference to and as illustrated by Fig. 4 of the accompanying drawings.
9. A demodulator circuit as claimed in claim 7 and substantially as hereinbefore described with reference to and as illustrated by Fig. 5 of the accompanying drawings.
10. A demodulator circuit as claimed in claim 7 and substantially as hereinbefore described with reference to and as illustrated by Fig. 6 of the accompanying drawings.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2853890A DE2853890C2 (en) | 1978-12-14 | 1978-12-14 | Method for demodulating phase, amplitude or frequency modulated signals with the aid of a phase-locked loop |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2039179A true GB2039179A (en) | 1980-07-30 |
GB2039179B GB2039179B (en) | 1983-04-13 |
Family
ID=6057089
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB7942100A Expired GB2039179B (en) | 1978-12-14 | 1979-12-06 | Demodulator circuit |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS5583307A (en) |
CA (1) | CA1158323A (en) |
DE (1) | DE2853890C2 (en) |
FR (1) | FR2444365B1 (en) |
GB (1) | GB2039179B (en) |
IT (1) | IT1127684B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3146280A1 (en) * | 1981-11-21 | 1983-06-23 | AEG-Telefunken Nachrichtentechnik GmbH, 7150 Backnang | Demodulators, the control information of which is obtained from a power detector |
JP2770342B2 (en) * | 1988-09-26 | 1998-07-02 | 日本電気株式会社 | Automatic phase control circuit |
DE4223257C2 (en) * | 1992-07-15 | 1994-07-14 | Telefunken Microelectron | Circuit arrangement for demodulating the SECAM color beard signal |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1122110B (en) * | 1958-03-20 | 1962-01-18 | Nippon Electric Co | Receiving system for frequency or phase modulated vibrations |
US3060383A (en) * | 1958-12-04 | 1962-10-23 | Itt | Gain regulation circuit |
GB925157A (en) * | 1960-06-29 | 1963-05-01 | Standard Telephones Cables Ltd | Circuit arrangement for effecting automatic frequency readjustment in television receivers |
US3209271A (en) * | 1961-08-17 | 1965-09-28 | Radiation Inc | Phase-locked loops |
AU472567B2 (en) * | 1972-01-20 | 1976-05-27 | National Aeronautics And Space Administration | Improved narrowband fm system for voice communications |
JPS52150922A (en) * | 1976-06-10 | 1977-12-15 | Sony Corp | Am receiver |
JPS6024640B2 (en) * | 1976-11-25 | 1985-06-13 | 日本ビクター株式会社 | Demodulator for angle modulated wave signals reproduced from multi-channel disc records |
-
1978
- 1978-12-14 DE DE2853890A patent/DE2853890C2/en not_active Expired
-
1979
- 1979-12-06 GB GB7942100A patent/GB2039179B/en not_active Expired
- 1979-12-07 IT IT28007/79A patent/IT1127684B/en active
- 1979-12-14 JP JP16174779A patent/JPS5583307A/en active Granted
- 1979-12-14 CA CA000341968A patent/CA1158323A/en not_active Expired
- 1979-12-14 FR FR7930775A patent/FR2444365B1/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6351406B2 (en) | 1988-10-13 |
IT1127684B (en) | 1986-05-21 |
IT7928007A0 (en) | 1979-12-07 |
GB2039179B (en) | 1983-04-13 |
CA1158323A (en) | 1983-12-06 |
FR2444365A1 (en) | 1980-07-11 |
JPS5583307A (en) | 1980-06-23 |
FR2444365B1 (en) | 1985-09-06 |
DE2853890A1 (en) | 1980-06-19 |
DE2853890C2 (en) | 1986-03-13 |
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Date | Code | Title | Description |
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732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |