GB2038128A - Two-stage field-effect transistor amplifier integrated circuit arrangement - Google Patents

Abstract

Two-stage field-effect amplifier integrated circuit arrangements, particularly for use as respective driving amplifiers for the word lines of a semiconductor store, comprising an input stage formed by the series connection of a switching transistor (T1) of the enhancement type controlled from a signal input terminal 1, and a passive load resistor formed by a transistor (T2) of the depletion type connected as a resistor, the output 3 of this input stage being connected to control a switching transistor (T3) of the enhancement type in an output stage formed by the transistor (T3) and a load circuit formed by a transistor (T4) of the depletion type which is directly controlled from the amplifier input terminal (1), to effectively shorten the overall switching time. <IMAGE>

Description

SPECIFICATION Two-stage field-effect transistor amplifier integrated circuit arrangement The present invention relates to integrated circuit amplifiers of the type using field effect transistors, and in particular for use as driving amplifiers for word lines of semiconductor stores, which comprise an input stage having a switching transistor of the enhancement type in series with a load resistor formed by a transistor of the depletion type, together with an output stage having a further switching transistor which is operated from the output of the input stage, and has a transistor arranged in its load circuit.

Muiti-stage integrated amplifiers constructed using MOS or MIS technology are commonly constructed in such manner that each stage has a controlled switching transistor with a load circuit that is formed by a further transistor connected as a passive resistor. Thus, the change-over behaviour at the individual stages of the amplifier depends purely upon the controlled transistor, which is operated by an input signal applied to its gate electrode from an input circuit or from the output of a preceding stage. Therefore, the switching time of the amplifier is determined by the switching behaviour of the controlled transistors of the individual stages.

For applications which require a quick switching behaviour, as for example in the case of the respective driving amplifiers for the word lines of semiconductor data stores, excessive switching times may be experienced when using amplifiers of the aforementioned type.

One object of the present invention is to provide an amplifier of this type that provides a shortening of the required switching times.

The invention consists in a two-stage fieldeffect transistor amplifer integrated circuit arrangement in which an input stage has a first switching transistor of the enhancement type connected to an input signal control terminal and having a second transistor, of the depletion type, arranged in its load circuit and connected as a passive resistor, and in which an output stage having a third transistor, of the enhancement type, operated as a switching transistor from an output of the input stage, said third transistor having a load circuit formed by a transistor of the depletion type which is directly controlled by any signal applied to the amplifier input signal control terminal.

The invention will now be described with reference to the drawing, which schematically illustrates the circuit of one exemplary embodiment.

The illustrated embodiment comprises a two-stage amplifier whose input stage has an input terminal 1 that is connected to control a switching transistor T, of the enhancement type having a passive load circuit formed by a transistor T2 of the depletion type, which is connected as a resistor. The load transistor T2 has one channel electrode connected to a terminal 2, to which is applied a supply voltage Vcc whereas the switching transistor T, has one channel connected to a further supply terminal, which is at earth potential in this embodiment. A circuit junction point 3, between the source-drain paths of the transis tors T1 and T2, forms the output point of this input stage.

This output point 3 is connected to control a switching transistor T3 of the enhancement type, in whose load circuit there is arranged a load transistor T4 of the depletion type, which has one channel electrode connected to a terminal 4, to which is applied the supply voltage Vcc. The circuit junction point between the source-drain paths of the transistors T3 and T4 is connected to an output terminal 5 of the amplifier.

The load transistor T4 in the output stage has its control electrode connected to be con trolled directly from the amplifier input termi nal 1.

The mode of operation of the above-men tioned amplifier is as follows: If we assume that the binary "0" state is represented by a zero signal at the amplifier input terminal 1, then this will produce a signal level ''1'' at the output point 3 of the input stage, in known manner, because the input stage operates as an inverter. The signal level ''1'' at the output point 3 of the input stage enables the switching transistor R3 to conduct, whereas the load transistor T4 is blocked by the "0" signal level from the input terminal 1. Thus, at the output terminal 5 of the amplifier there is presented the signal level "0".

When the signal applied to the amplifier input terminal 1 has a signal level ''1", the switching transistor T, is enabled to conduct, so that the output point 3 of the input stage is connected to earth, i.e. the level "0" is then present at the output 3 of the input stage.

This causes the switching transistor T3 to be blocked. Since the load transistor T4 is oper ated directly from the amplifier input terminal 1 it is caused to be low-ohmic by the signal level ''1" that is then being applied, and assists in changing over the potential at the amplifier output terminal 5 to the signal level "1". Thus the load transistor T4 does not act as a passive load resistor, in the manner of the load transistor T2 of the input stage, but serves as a dynamic resistor which is controlled from the amplifier input terminal 1 to present a high resistance or low resistance as a function of the signal level which is applied at the amplifier input terminal 1.-Thus the load transistor T4 enhances the change-over behaviour of the switching transistor T3 of the output stage, to shorten the overall switching time of the amplifier.

Claims (2)

1. A two-stage field-effect transistor amplifier integrated circuit arrangement in which an input stage has a first switching transistor of the enhancement type connected to an input signal control terminal and having a second transistor, of the depletion type, arranged in its load circuit and connected as a passive resistor, and in which an output stage having a third transistor, of the enhancement type, operated as a switching transistor from an output of the input stage, said third transistor having a load circuit formed by a transistor of the depletion type which is directly controlled by any signal applied to the amplifier input signal control terminal

2. A two-stage field-effect transistor amplifier integrated circuit arrangement substantially as described with reference to the drawing.