GB2033627A

GB2033627A - A method of error checking contents of a register

Info

Publication number: GB2033627A
Application number: GB7940874A
Authority: GB
Original assignee: Pitney Bowes Inc
Current assignee: Pitney Bowes Inc
Priority date: 1977-10-28
Filing date: 1978-10-27
Publication date: 1980-05-21
Also published as: FR2407536B1; GB2066734B; GB2008030A; GB2066735A; GB2033627B; GB2008030B; GB2066735B; GB2066734A; FR2407536A1

Abstract

A check sum is derived arithmetically from the contents of a register, complemented, and stored in a second register. Subsequently to perform an error check the check sum is recalculated, complemented, and subtracted from the stored check sum. A result different from zero indicates an error even where all stored data, i.e. the data and its complemented check sum, are affected consistently e.g. lost due to a shutdown.

Description

1 GB 2 033 627 A 1

SPECIFICATION

A method of error checking contents of a register This invention relates to a method of error checking contents of a register such as an ascending or descending register in an accounting machine or a postage meter.

According to the invention, we provide a method of error checking contents of a first register comprising deriving a first arithmetic value in accordance with a given relationship corresponding to the contents of said first register, complementing said first arithmetic value, and storing it in a second register, then deriving a second arithmetic value in accordance with said given relationship corresponding to the contents of said first register, complementing said second value, and then comparing said second value with the contents of said second register to produce an error signal in the absence of a predetermined relationship being established as a result of said comparsion.

This application is divided out of application No. 78 42183 published on 31 May 1979 (Publication Serial No. 2 008 030 A) and the reader is referred to the said publication for a full and exhaustive description of an electronic postage meter system. The method according to the present invention may be used in such a system. The contents of the said publication are hereby incorporated herein by reference, but will not be quoted in extenso for the sake of brevity.

An example of the present invention will be better understood by reference to the accomapnying draw- ings in which:- Figure 1 is a flow chart of a TNVM subroutine which checks for the presence of error indicators stored in a nonvolatile memory and Figure 2 is a flow chart of a CHKSM subroutine which generates error-detecting checksums for stored information.

Figure 3 is a flow chart showing modification of the TNVM subroutine of Figure 1, and Figure 4 is a flow chart showing a modification of the subroutine of Figure 2, Figures 3 and 4 herein illustrating the present invention.

For a fuller understanding of the basic organisation of a postage meter system within which, in accordance with one embodiment, the present invention may be incorporated, the reader is referred to the said Publication No. 2 008 030 A. Figures 1 - 4 herein correspond to Figures 30, 34, 52 and 53 of the publication.

Figure 1 is a flow chart of a subroutine herein called a TNVM subroutine which checks for correspondence between checksums and data stored in the nonvolatile memory. The subroutine also checks whether the sum of the contents of the ascending and descending registers equal the control sum.

The first step (block 3002) of the subroutine is to initialise registers to select the first register in the nonvolatile memory, to select a status character location into which an error code can be written and to set up a four count loop. Data stored in the selected register of the non-volatile memory, exclud- 130 ing stored checksum words, is summed to generate a checksurn for the register contents in an operation 3004. The checksum already stored in the register is retrieved and the generated check sum subtracted therefrom (block 3006). If the difference between the stored checksurn and the generated checksum are not equal to zero, indicating that errors have occurred either in writing data into or reading data from the nonvolatile memory, an error message is gener- ated (block 3008) for that particular register. If the stored checksum does equal the generated checksum, a determination (block 3010) is made as to whetherthe last nonvolatile memory register has been tested. If the last register has yet to be tested, the next register is selected (block 3012) and control is looped back to block 3004, to repeat the checksurn generation and comparison process. When the last nonvolatile register has been tested, any resulting error bits are written (block 3014) into status charac- ter zero (OSCO) of register two in random access memory 38.

By reference to Figure 19 of Publication No. 2 008 030 A referred to above, it will be realised that a status character is a 4-bit memory location. A binary 'Vin any bit of that word indicates a checksum error in the particular register associated with that bit.

The TNVM subroutine retrieves and adds the contents of the ascending register and descending register (block 3016) after which the sum is subtracted from the retrieved control sum. If a difference other than zero is noted, as it should be during proper operation, the accumulator carry bit is cleared. The last step on the subroutine (block 3018) is a branch back to the main program.

Figure 2 is a flow chart of a CHKSM subroutine which is called to generate new checksums for selected registers in the nonvolatile memory when the contents to those registers have been changed. The starting address of the NVM register has been selected, a pair of temporary registers are initialized (block 3402) by loading them with zeros. A four bit word from the selected nonvolatile memory register is then read and added to the contents of these registers, arbitrarily designated as register Rb. Carry bits are accumulated in an adjacent register Ra. During the first cycle of the CHKSM subroutine, there is of course no carry bit. The address register which indicates the nonvolatile memory word being read is incremented and a determination (block 3404) is made as to whether the last word in the register has been read. The decision 3404 is made using a count loop of the type discussed in Specification 2008 030 A. The count loop is not expressly illustrated in the CHKSM flow chart. 1

If the end of the selected NVM register has not been reached, the cycle is repeated with a new four bit word being read from memory and added to the previously accumulated words in register Rb. The carry (if any) which results from this step is added to the contents of register Ra. When the end of the loop is reached, the contents of registers Ra and Rb are written into the checksum locations for the selected NVIV1 register. The high order or carry is written into word 0 of the register while the low order is written into work 1. Control is returned to the main program.

2 GB 2 033 627 A 2 In the TNVM subroutine illustrated in Figure 1, a direct comparison was made between the stored checksum and data stored in the nonvolatile mem ory. In the event that all data have been lost during a shut-down period, then this checking operation would proceed normally. In order to avoid this, in accordance with a modification of the invention, the complement of the checksum may be stored in rows zero and one of the NVM register. This modification is illustrated in the subroutine of Figure 3, wherein the generator checksum derived from the register contents is complemented and subtracted from the complemented stored checksum in rows zero and one of the register. If the data in the register has been lost during the shut-down period, this comparison of the complements of the checksum will reveal the error.

The routine in accordance with Figure 3 therefore overcomes an additional source of possible error in the system.

In order to implement the routine of Figure 3, it is, of course, necessary to complement the stored checksum. This may be effected by the routine illustrated in Figure 4, which shows the necessary modification of the routine of Figure 2. Thus, before writing Ra and Rb in the NVIV1 checksurn location, these values must be complemented. While Figures 3 and 4 illustrate this modification as being software modification, it is, of course, apparent that they may also constitute a part of the hardware of the system in accordance with the invention.

The invention as disclosed with reference to Figures 3 and 4 ensures that binary ones and zeros are in each register. In the event of total loss of stored data each register would contain either all ones or all zeros, and consequently the complemented checksum routine will ensure recognition of the error.

Claims

1. A method of error checking contents of a first register comprising deriving a first arithmetic value in accordance with a given relationship correspond- ing to the contents of said first register, complementing said first arithmetic value, and storing it in a second register, then deriving a second arithmetic value in accordance with said given relationship corresponding to the contents of said first register, complementing said second value, and then comprising said second value with the contents of said second registerto produce an error signal in the absence of a predetermined relationship being established as a result of said comparison.

2. A method according to claim land substantially as herein described with reference to Figures 3 and 4 of the accompanying drawings.

Printed for Her Majesty's Stationery Office by Croydon Printing Company Limited, Croydon Surrey, 1980. Published bythe Patent Office, 25 Southampton Buildings, London, WC2A lAY, from which copies may be obtained.

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