GB2032215A - Electronic Stencil Cutters - Google Patents
Electronic Stencil Cutters Download PDFInfo
- Publication number
- GB2032215A GB2032215A GB7840951A GB7840951A GB2032215A GB 2032215 A GB2032215 A GB 2032215A GB 7840951 A GB7840951 A GB 7840951A GB 7840951 A GB7840951 A GB 7840951A GB 2032215 A GB2032215 A GB 2032215A
- Authority
- GB
- United Kingdom
- Prior art keywords
- stencil
- stylus
- sheet
- spot
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41C—PROCESSES FOR THE MANUFACTURE OR REPRODUCTION OF PRINTING SURFACES
- B41C1/00—Forme preparation
- B41C1/14—Forme preparation for stencil-printing or silk-screen printing
- B41C1/141—Forme preparation for stencil-printing or silk-screen printing by cutting or perforation with mechanical means; Electrical spark cutting
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Manufacture Or Reproduction Of Printing Formes (AREA)
Abstract
Making use of solid state technology and integrated circuits to control the stylus in an electronic stencil cutter using pulse modulated signals, the reflected light spot from the document to be copied is received by a silicon photocell 5 from which analogue signals pass to an amplifier 6 and interface circuit 7 and thence to a voltage to frequency converter 8, either directly for a "line" print or through a tone correcting circuit 9 for a "tone" print. The output from the converter 8 comprises pulses whose frequency is a function of the analogue voltage, and which pass to packages 10 comprising monostables, which shape each pulse to a form suitable for a centre-tapped transformer 12. V channel MOS power FET switches 11 are used to amplify the current supplied to the transformer, thereby enabling about 400 volts to be applied to the stylus which at each pulse cuts a dot in the stencil, not shown, which is mounted alongside said document, the tones to be printed depending on the density of the dots. The tone correcting circuit 9 comprises a summing network which provides a voltage output that varies in relation to the input so as substantially to eliminate inaccurate tonal variations in the reproduction. <IMAGE>
Description
SPECIFICATION
Electronic Stencil Cutters
This invention relates to electronic stencil cutters. Such cutters usually comprise a uniformly rotatable cylinder around which is mounted a sheet bearing the information to be copied. On the same cylinder an electronic stencil is wrapped alongside the sheet. Usually the stencil consists of a carbon coated web or a plastics coated PVC honeycomb from which the coating is selectively removed by a spark discharge to produce a pattern corresponding to the information to be copied. Alternatively a litho plate may be made by causing the spark to etch an aluminium sheet on a permanent backing. In this specification the term "stencil" is intended to include such a plate.A carriage traverses the length of the cylinder and carries an optical detector together with lamps that illuminate a spot on the paper which is detected and electronically processed to control the spark which is discharged from a stylus also carried by the carriage. The spark cuts a pattern in the stencil corresponding to the information being copied.
The signals picked up by the optical detector have hitherto, so far as is known, been amplitude or pulse width modulated signals which have been applied to the stylus to cut the corresponding pattern. One aim of the invention is to overcome the problems involved in applying solid state, digital integrated circuit technology to the scanning system, thereby reducing costs and increasing reliability.
According to the invention, an electronic stencil cutter comprises first support means for mounting a sheet bearing information to be copied and a stencil side by side, second support means carrying a light source for illuminating a spot on the sheet and an optical detector for detecting light reflected from the spot, said second support means also carrying a stylus positioned so that when the light spot traverses a line on the sheet, said stylus traverses a corresponding line on the stencil, means for effecting relative movement between said first and second support means whereby areas are traversed line upon line by the spot and said stylus respectively on said sheet and said stencil, an electronic circuit for delivering analogue signals from said detector corresponding to variations in the detected light as the light spot scans the sheet, a voltage to frequency converter for converting said analogue signals to frequency modulated signals and means for applying the frequency modulated signals to said stylus whereby a series of dots is cut by the stylus in the stencil as the stylus traverses the stencil, the density of the dots varying with the tone scanned by the light spot on the sheet. Very advantageously, said means for applying the frequency modulated signals includes monostable packages arranged for each positive pulse to be shaped into sequential positive and negative portions of equal length with a comparatively small gap therebetween, the shaped pulses being fed to a transformer through which the pulses are delivered to the stylus. Preferably, in order to provide the required power, current supplied to the transformer is amplified by feeding the shaped pulses through V channel MOS power FET switches.
A particular feature of the invention believed to be new in itself, consists in including, when required, in the circuit a tone correcting network having a plurality of parallel limbs connected to a common input for receiving said analogue signals, said limbs being respectively set to begin to conduct at different applied input voltages and the outputs of the limbs being added and applied to an amplifier.
In order that the invention may be clearly understood and readily carried into effect one circuit for an electronic stencil cutter will now be described, by way of example, with reference to the accompanying drawings, in which: Figure 1 is a block diagram showing the arrangement of individual units in the circuit;
Figures 2 and 3 are circuit diagrams of alternative forms of photocell amplifier for use in the circuit of Figure 1;
Figure 4 is a circuit diagram of a portion of the circuit of Figure 1 between the photocell amplifier and stylus;
Figures 5 and 6 are explanatory graphs; and
Figure 7 is a circuit diagram of a tone correcting circuit.
Referring to Figure 1, an original document 1 to be copied is clamped round a cylinder 2 that rotates, for example, at 400 r.p.m. The document is scanned by a unit comprising two lamps 3 and an optical tube 4 which, in known manner, traverses lines parallel to the cylinder axis, which lines are spaced by a predetermined amount, say between two and five thousandths of an inch, depending on the refinement of printing and speed of printing required.
Light reflected from a spot about five thousandths of an inch diameter on the document is magnified by an optical system in the tube 4 and received by a silicon photocell 5 from which a signal varying in amplitude according to variations in tone of the line being scanned passes to an amplifier 6 to produce the correct response required at the stylus. The signal is then fed by way of an interface circuit 7 to a voltage to frequency converter 8, either directly for a "line" print (i.e., a two tone print) or through a tone correcting circuit 9 for a "tone" print.
The pulsed output from the converter 8 which has a wide range of frequency passes to monostables 10 which shape each pulse to provide pulses of constant width and amplitude that are fed directly to V channel MOS power FET switches 11 delivering pulses having considerably amplified amperage to an output transformer 12 that delivers +400 volt pu s as to the stylus and stencil 13. If, however, the stencil is replaced by a litho plate of the kind in wl ich the sparks etch an aluminium ink repellant eli minium layer on a mylar base, a correcting circuit 14 is interposed between the transformer and stylus.
While the stencil or litho plate may be of any type normally used in electronic stencil cutters, the manner in which the spark discharge is applied is believed to be novel in that for each pulse one dot, is etched and tonal variations depend on the density of the dots. The stylus traverses the stencil at a uniform speed but the frequency of the pulses applied to the stylus varies with a consequent variation of the spot density and consequent tonal variation of the print overall resolution should be five thousandanths of an inch.
The various units in the above-described circuit are readily available integrated circuits and these are indicated in Figures 2, 3, 4, 7 by type designations (e.g., LF 351 operational amplifier) which are well known to those skilled in the art.
These figures also show the primary electricai constants employed in the circuits. It will be understood, however, that these details are purely by way of example and many alternatives both in regard to the units employed and to the numerical values are possible.
Figure 2 shows a circuit for the photocell amplifier 6 comprising a single amplifier 1 5 for use in monochrome printing. Where full tone colour printing are required, that is to say where several stencils allocated to different colours are to be made, the circuit of Figure 3 is used. In this a second operational amplifier 1 6 is connected in series with the first and its negative feedback circuit comprises five parallel resistors to be used alternatively according to the colour filter used in the optical system The brightness of the lamps illuminating the original document is kept constant, thus preserving a constant spectral response. Switch connections W, G, R, B are provided respectively for use with white (i.e., no filter), green, red and blue filters.The output of the amplifier circuit (Figure 2 or Figure 3) varies between zero and -7.15 volts.
As the voltage to frequency converter can only accommodate positive voltage inputs, the interface circuit is provided to shift the -7.15 to zero range of the amplifier to zero to +7.1 5 volts.
This interface circuit comprises an operational amplifier 17 (Figure 4).
If the tone corrector circuit 9 is used, this is
inserted at 1 8 in Figure 4. In either event the
analogue signal is fed by line 19 to the voltage to frequency converter 8 which is a Motorola
integrated circuit type MC 14046 BCP. The
conversion from voltage to frequency is
substantially linear over the major portion of the
zero to +7.1 5V range but for less than 1 .65V
input there is not a complete frequency cut off.
However, for the whitest tone to be printed such a
cut off is desirable. Therefore, a further circuit 20
(Figure 4) may be inserted which, by way of a line
21, operates so as to cut out the frequency
response completely when the input voltage falls
below say 1.7 volt.
The pulse shaping monostables 10 of Figure 1 are represented in Figure 4 by two monostable packages 22, 23 (type MC 14528 BCP) and a
current boosting device 24 (type MC 14050
BCP). The pulse output of the converter 8 may be
represented by the waveform a in Figure 5. The first monostable package 22 reduces the period of each pulse, as shown by waveform b, to approximately 1.0 microsecond. The second monostable package 23 curtails the end of each pulse so as to form a pulse of period x followed by a period y within the 1.0 microsecond period, as shown by waveform c. Monostable package 23 also forms a second series of pulses of period x each immediately following a period y as shown by waveform d. The period x may be 0.9 microsecond and the period y 0.1 microsecond.
These waveforms are fed to the V channel MOS
FET switches 11. These are manufactured by
Siliconix Inc. As will be seen there are four of these connected in parallel pairs to provide a substantial current amplification to about 3 amps to drive the centre-tapped transformer 12. This transformer gives phase reversal to one pulse train, resulting in the wave shape e of Figure 5.
The small zero period y in each pulse provides an interval enabling the transformer effectively to swing over from the positive to the negative part of each pulse.
Referring now the tone correcting circuit 9 (Figure 1) this is necessitated by the lack of a totally linear relationship between the voltage range zero to 7.15 and the logarithmic gradations required to give the current tonal range. The measured responses are of the photocell amplifier is shown approximately by curve A in Figure 6. To counteract this it would be ideally necessary to provide a correcting circuit such that the relationship between input and output is approximately curve B. However, it has been found that the design of such -a circuit that is both effective and economical to make, presents problems. Therefore, the circuit of Figure 7 has been designed to produce an output that has been found to be effective in practice. This output is represented by three straight lines C, D, E in
Figure 6. This circuit includes a summing network to which the voltage input is applied at the point 25. At low input voltages the signal is applied through an uppermost limb of the network to an amplifier 26, the input-output relation being as indicated by the line C of Figure 6. When the breakpoint between the lines C and D is reached this being determined by a variable resistor 27 controlling the voltage at which diode 28 conducts, the lowermost limb becomes effective but this contains an inverting amplifier 29 so that its effect is subtracted from that of the uppermost limb, thereby reducing the slope of line D below that of line C. When the break point between lines
D and E is reached, this being determined by variable resistor 30, the centre limb of the network becomes effective so that the sum of the three limbs produces the input-output relationship of line E. The outputs of the amplifier 26 are negative and so are shifted to positive by a further amplifier 31.
Claims (7)
1. An electronic stencil cutter comprising first support means for mounting a sheet bearing information to be copied and a stencil side by side, second support means carrying a light source for illuminating a spot on the sheet and an optical detector for detecting light reflected from the spot, said second support means also carrying a stylus positioned so that when the light spot traverses a line on the sheet said stylus traverses a corresponding line on the stencil, means for effecting relative movement between said first and second support means whereby areas are traversed line upon line by the spot and said stylus respectively on said sheet and said stencil, an electronic circuit for delivering analogue signals from said detector corresponding to variations in the detected light as the light spot scans the sheet, a voltage to frequency converter for converting said analogue signals to frequency modulated signals and frequency modulated signals to said stylus whereby a series of dots are cut by the stylus in the stencil as the stylus traverses the stencil, the density of the dots varying with the tone scanned by the light spot on the sheet.
2. A stencil cutter according to Claim 1, in which said means for applying the frequency modulated signals includes monostable packages arranged for each pulse to be shaped into two sequential portions of equal length with a comparatively small gap therebetween the shaped pulses being fed to a transformer through which the pulses are delivered to the stylus.
3. A stencil cutter according to Claim 1 or
Claim 2, in which said means for applying the frequency modulated signals include V channel
MOS power FET switches operating as current amplifiers.
4. A stencil cutter according to any one of the preceding claims, in which the optical detector comprise a silicon photocell.
5. A stencil cutter according to any one of the preceding claims, including a tone correcting network having a plurality of parallel limbs connected to a common input for receiving said analogue signals, said limbs being respectively set to begin to conduct at different applied input voltages and the outputs of the limbs being added and applied to an amplifier.
6. An electronic stencil cutter substantially as hereinbefore described with reference to Figures 1 to 5 of the accompanying drawings.
7. An electronic stencil cutter according to
Claim 5 and substantially as hereinbefore described with reference to Figures 6 and 7 of the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7840951A GB2032215A (en) | 1978-10-18 | 1978-10-18 | Electronic Stencil Cutters |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7840951A GB2032215A (en) | 1978-10-18 | 1978-10-18 | Electronic Stencil Cutters |
Publications (1)
Publication Number | Publication Date |
---|---|
GB2032215A true GB2032215A (en) | 1980-04-30 |
Family
ID=10500406
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB7840951A Withdrawn GB2032215A (en) | 1978-10-18 | 1978-10-18 | Electronic Stencil Cutters |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2032215A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0508624A2 (en) * | 1991-04-10 | 1992-10-14 | Riso Kagaku Corporation | Method for processing a stencil master plate by using a thermal head |
EP0517541A1 (en) * | 1991-06-06 | 1992-12-09 | Brother Kogyo Kabushiki Kaisha | Stamp device having means for controlling dot perforation density |
CN117077611A (en) * | 2023-10-13 | 2023-11-17 | 青岛展诚科技有限公司 | Integrated circuit layout graph cutting method |
-
1978
- 1978-10-18 GB GB7840951A patent/GB2032215A/en not_active Withdrawn
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0508624A2 (en) * | 1991-04-10 | 1992-10-14 | Riso Kagaku Corporation | Method for processing a stencil master plate by using a thermal head |
EP0508624A3 (en) * | 1991-04-10 | 1993-07-14 | Riso Kagaku Corporation | Method for processing a stencil master plate by using a thermal head |
US5526032A (en) * | 1991-04-10 | 1996-06-11 | Riso Kagaku Corporation | Method for processing a stencil master plate by using a thermal head |
EP0517541A1 (en) * | 1991-06-06 | 1992-12-09 | Brother Kogyo Kabushiki Kaisha | Stamp device having means for controlling dot perforation density |
US5251567A (en) * | 1991-06-06 | 1993-10-12 | Brother Kogyo Kabushiki Kaisha | Stencil making device having means for controlling dot perforation density |
CN117077611A (en) * | 2023-10-13 | 2023-11-17 | 青岛展诚科技有限公司 | Integrated circuit layout graph cutting method |
CN117077611B (en) * | 2023-10-13 | 2024-01-23 | 青岛展诚科技有限公司 | Integrated circuit layout graph cutting method |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |