GB2026267A

GB2026267A - Synchronous demodulation circuits

Info

Publication number: GB2026267A
Application number: GB7826435A
Authority: GB
Original assignee: Post Office
Current assignee: Post Office
Priority date: 1978-06-06
Filing date: 1978-06-06
Publication date: 1980-01-30

Abstract

In a synchronous demodulation circuit including an oscillator (14) of controllable frequency and an oscillator control circuit (8, 9, 10, 11) arranged in a phase-locked loop with the oscillator circuit to correct, within a certain range, the tuning of the oscillator circuit, a further oscillator control circuit (16) is arranged in a second control loop with the oscillator circuit to bring the oscillator frequency within the control range of the phase-locked loop in the circumstances of the tuning error being too great for the first-mentioned oscillator control circuit to correct. <IMAGE>

Description

SPECIFICATION Synchronous demodulation circuits This invention relates to synchronous demodulation circuits.

It is known to transmit the video content of a television signal in vestigial sideband amplitude modulation form and to use a synchronous demodulator in the receiver to extract the video content. High qualitytelevision receivers as used by the broadcasting authorities for monitoring reception usually employ a phase-locked loop circuit to produce the reference for the synchronous demodulator. Since, however, in the United Kingdom, television pictures have twenty-five frames per second there is a danger of the phase-locked loop circuit locking incorrectly to a frequency spaced some multiple of 25 Hertz from the correct frequency. This danger is avoided in practice by sampling the modulated signals at instants of time when the carrier amplitude is known to be constant, conveniently when the video signal is at synchronisation level.The sampled signal has energy at the carrier frequency and at sideband frequencies which are multiples of the line scanning frequency (15 625 hertz in the United Kingdom) from the carrier frequency. There is still a danger of the phase-lock loop circuit locking incorrectly to one of the sideband frequencies, but this danger is avoided in practice by limiting the 'capture-range' of the phase-locked loop circuit, that is the range over which the control loop can achieve lock, and ensuring that the translated vision carrier frequency is within this capture range.

The short-term frequency stability of inexpensive continuously-tunable frequency translators (such as those employed in domestic television receivers) is not generally good enough for them to precede this type of phase-locked loop circuit, and a high-quality frequency translator employing frequency synthesis techniques must be used to position the translated vision carrier frequency within the capture range of the phase-locked loop. However, since the vision carrier frequencies used for over-the-air television broadcasting in the United Kingdom are precise controlled and regularly spaced at 8 megahertz intervals, the high-quality frequency translator in a tunable receiver need be variable only in precise 8 megahertz steps and is consequently not prohibitively expensive.Special provisions have to be made in the frequency translator to cater for situations where vision carrier frequencies have precision off sets from their nominal values to reduce the effects of intermodulation distortion.

Television transmission is not, however, limited to broadcasting over the air by the broadcasting authorities; cabled-distribution of television signals exists and other bodies (for example, the Post Office) are concerned with transmitting television signals. In these alternative circumstances the vision carrier frequency may not be so accurately controlled as in the case of over-the-air broadcasting by the broad casting authorities and may not be regularly spaced at 8 megahertz intervals. Consequently a frequency translator is required with a much higher resolution than is necessary for the reception of television signals broadcast over the air. The cost of a fre quency translator with the required resolution would be far higher than the cost of an ordinary high quality frequency translator.

It is possible to obtained a reference signal for synchronous demodulation without a phase-locked loop by means of filtering the modulated signal and limiting its amplitude, but the amplitude limiter in practice introduces some phase modulations which causes distortion of the demodulated video signal.

As an alternative to synchronous demodulation, it is known to use envelope detection but this, although relatively inexpensive, has the disadvantage of introducing an impairment known as quadrature distortion. Thus, conflicting problems of cost and distortion are associated with circuits for the demodulation of vestigial sideband amplitude modulation television signals.

The present invention provides a synchronous demodulation circuit including an oscillator of controllable frequency and an oscillator control circuit arranged in a phase-locked loop with the oscillator circuit to correct, within a certain range, the tuning of the oscillator circuit, wherein a further oscillator control circuit is arranged in a second control loop with the oscillator circuit to bring the oscillator frequency within the control range of the phase-locked loop in the circumstances of the tuning error being too great forthefirst-mentioned oscillator control circuit to correct.

The second control circuit can include a non-linear circuit the input/output characteristic of which includes a dead-space corresponding to the range of tuning error correctable by the first-mentioned oscillator control circuit, the non-linear circuit being external to the phase-locked loop and connected to receive the output of a tuning error detector in the second control loop.

The tuning error detector of the second control circuit can be a frequency detector circuit. The said frequency detector circuit can comprise a phase/frequency detector circuit and a low-pass filter circuit, the output of the phase/frequency detector circuit being connected to the low-pass filter circuit.

The frequency detector circuit can have a first input arranged to receive a reference signal, an amplitude limiting circuit can be arranged to supply the frequency of an incoming signal to a second input of the frequency detector circuit, and a bandpass filter circuit can be commonly connected in both the phase-locked loop circuit and the second control circuit.

A low-pass filter circuit can be commonly connected in both the phase-locked loop and the second control circuit, the output of the filter circuit being connected to control the oscillator circuit.

A summation circuit can be provided and have a first input connected to the phase-locked loop, a second input connected to the second control loop, and an output connected to the filter circuit con nected to control the oscillator circuit.

The phase-locked loop can include as a tuning error detector a phase detector circuit and a phase sampling circuit arranged to supply the phase of an incoming signal and the phase of a reference signal to the phase detector circuit at instants when the amplitude of the incoming signal is known to have a reference value.

In the case where the synchronous demodulation circuit is to be used for demodulating the video content of a television signal, the phase-sampling circuit can be operative to sample the incoming signal at instants corresponding to the times of occurrence of the synchronisation pulses.

The oscillator circuit can be arranged to supply to a demodulation stage the reference waveform required for performing synchronous demodulation.

Alternatively, a fixed frequency oscillator can be provided to supply the reference waveform required for performing synchronous demodulation, a mixer circuit can be connected to receive an incoming signal and the output of the controllable oscillator circuit as inputs, and the output of the mixer circuit can be connected to a demodulation stage for synchronous demodulation with respect to the reference waveform.

A vestigial sideband filter circuit can be connected prior to the demodulation stage in the path of the signal to be synchronously demodulated.

By way of example only, two illustrative embodiments of the invention will now be described with reference to the accompanying drawings, in which: Figure 1 shows in block schematic form a first video demodulation circuit embodying the invention, and Figure 2 shows in block schematic form a second video demodulation circuit embodying the invention.

The circuits shown in the accompanying drawings are for use in synchronously demodulating the video content of a television signal employing vestigialsideband amplitude modulation for the video information.

The circuit of Figure 1 is a non-precision demodulation circuit for use where cheapness is more important than high quality but the circuit of Figure 2 is a precision demodulation circuit.

Referring to Figure 1, the television signal to be demodulated is applied via line 1 to the input of a ratio frequency amplifier 2. The output of the amplifier 2 is connected to a mixer 3 which is connected to receive also the output of a frequency synthesiser 4. The output of the synthesiser 4 is a frequency higher than that of the video carrier to give an intermediate frequency output on line 5. Line 5 is connected to a vestigial sideband filter 6 and also to a bandpass filter 7. The output of filter 7 is connected to the input of an amplifier and limiter 8 and to one pole of a switch S1.

The output of amplifier and limiter 8 is connected to one input of a phase/frequency detector 9, the output of which is connected to a low-pass filter 10.

The output of the low-pass filter 10 is connected to the input of a non-linear circuit 11, the output of which is connected to one input of a summation cir cuit 12.

The output of the summation circuit 12 is con nected to a low-pass filter 13, the output of which is connected to a voltage-controlled crystal oscillator 14. The output of the oscillator 14 is connected to provide a second input to the detector 9 and an input to a synchronous demodulator 15, and is connected to one pole of a switch S2. Switches S1 and S2 are ganged together and are an electronic sampling switch. Means (not shown) are provided to close switches S1 and S2 at regular instants when the envelope of the modulated signal is unchanged in amplitude, conveniently when the video signal is at synchronisation level.

The other poles of switches S1 and S2 are connected to respective inputs of a phase detector 16, the output of which is connected as a second input to the summation circuit 12.

The output of filter 6 is connected to the synch ron- ous demodulator 15 and the output of the synch ron- ous demodulator 15 is referenced 17.

The circuit of Figure 2 is similar to the circuit of Figure 1 as indicated by the use of identical but primed reference numerals for corresponding blocks. Description of Figure 2 is therefore confined to its differences from the circuit of Figure 1, connections and blocks not specifically mentioned being provided and arranged in identical manner to those of Figure 1 Referring to Figure 2, the mixer 3' is not connected directly to the vestigial sideband filter 6' but has its output connected through a bandpass filter 20 to a first intermediate frequency amplifier 21. The output of the amplifier 21 is connected to a mixer 22, the output of which is connected to the filter 6'. The voltage-controlled crystal oscillator 14' does not have its output connected to the demodulator 15' but has it connected to the mixer 22.The frequency of the voltage-controlled crystal oscillator 14' is therefore much higher than that of the voltage-controlled crystal oscillator 14 in Figure 1. A fixed frequency crystal oscillator 23 has its output connected to one pole of switch S2', demodulator 17' and phase/frequency detector 9'.

The operation of the circuits of Figures 1 and 2 will now be described. It is assumed that an incoming television signal to be demodulated carries its video content in vestigial sideband amplitude modulation form.

Considering Figure 1 first, an incoming radio frequency amplitude-modulated television signal on line 1 is amplified by the radio frequency amplifier 2.

The amplified radio frequency signal undergoes frequency conversion in the mixer 3 to produce an intermediate frequency (IF) output on line 5. The IF output is modified by the vestigial-sideband shaping filter 6 and passed to the synchronous demodulator 15.

The bandpass filter 7 is tuned to the nominal intermediate frequency. The filter 7 produces a narrow band double sideband signal from the IF output signal fed to it and this action is equivalent to partially removing the modulation from the IF output. Remaining amplitude modulation is removed by the amplitude limiter 8 which therefore has an output corresponding to frequency-converted video carrier.

Although the carrier frequency is well-defined the amplitude limiter 8 in practice introduces some phase modulation of the carrier.

The oscillator 14 is used to provide the reference waveform for synchronous demodulation in the demodulator 15 and for the purposes of explanation, let it be assumed that there exists a gross difference in frequency between the output of the oscillator 14 and the output of limiter 8. A comparison of the output of the oscillator 14 and the output of limiter 8 is made by the phase/frequency detector 9. The output of the phase/frequency detector 9 is a direct voltage, corresponding to the frequency difference between the two outputs, with an alternating component, corresponding to the time-varying instantaneous phase difference between the two outputs, superimposed.

The alternating component is removed by the lowpass filter 10 and the direct voltage applied to the non-linear circuit 11. The circuit 11 has an input/output characteristic as represented by the graphical representation on block 11 shown in the drawing, the ordinate representing output voltage and the abscissa representing input voltage. The circuit 11 provides no output for input voltages within predetermined limits about zero voltage, outside this deadspace the input/output characteristic being linear. Since a gross frequency difference has been assumed, the circuit 11 produces an output which is applied to the voltage-controlled oscillator 14 by way of the summation circuit 12 and the low-pass filter 13.

The output of the circuit 11 causes the frequency of the oscillator 14 to change in a direction such as to reduce the difference in frequency between the oscillator output and the output of the limiter 8. Further correction is made to the oscillator frequency in this manner until the output of filter 10 is sufficiently close to zero so as to fall within the deadspace of the circuit 11. When this is the case, the frequency of the oscillator 14 is within the capture range of the phase-locked loop circuit formed by phase detector 16, low-pass filter 13 and oscillator 14. The final phase correction is thus provided by the phase detector 16 comparing the output of the oscillator 14 with the output of the filter 7 when the video signal is at synchronisation (conveniently) level. At these instants the carrier level is constant.The output of the phase detector 16 is applied to the oscillator 14 by way of the summation circuit 12 and the filter 13 and causes the output frequency of the oscillator to change so as to achieve phase synchronism with the vision carrier. The output of the phase detector 16 is substantially constant during the time switches S1 and S2 are open owing to the integrating action of low-pass filter 13.

It should be noted that changes in the output of phase detector 16 during initial correction of a gross frequency difference by the detector 9 will have little effect.

Thus, the circuit of Figure 1 has two control loops, one,including the detector 9, for correcting gross frequency errors and the other, including the detector 16, for acquiring phase lock at the correct frequency once gross frequency errors have been corrected. By this means, the circuit of Figure 1 is able to establish a phase-lock from an initial condition in which there is a gross frequency error without the circuit locking to a sideband.

In the circuit of Figure 2, double frequency conversion is employed (mixers 3' and 22) and the demodulator 15' is supplied with a fixed frequency reference signal equal to the second intermediate frequency. The output frequency of the oscillator 14' is equal to the first intermediate frequency plus or minus the second intermediate frequency. In the phase/frequency detector 9' the second intermediate frequency is compared with the output of the oscillator23 and gross differences corrected by means of the control loop comprising blocks 14, 22, 7', 8', 9,' 10', 11', 12', and 13'. Once sufficient correction has been made to bring the output of filter 10' within the deadspace of non-linear circuit 11', the phase detector 16' is able to acquire phase lock at the correct frequency by means of the control loop comprising blocks 14', 22, 7', 16', 12', and 13'.The advantage of the circuit of Figure 2 over the circuit of Figure 1 is that in the former circuit the intermediate frequency applied to the vestigial sideband filter (6') is precisely defined and an accurate match with the tuning of the filter can therefore be obtained. In the circuit of Figure 1 a misalignment between the intermediate frequency and the tuning of the filter 6 might arise in practice. Such misalignment could cause waveform distortion but still be good enough for ordinary domestic use.

The circuits of Figures 1 and 2 possess the advantage that they enable synchronous demodulation to be achieved without the need for a precision frequency synthesizer; a resolution of 500 kilohertz for block 4' in Figure 2 is quite adequate for television signals with carrier frequencies in the UHF (ultra high frequency) and VHF (very high frequency) bands, as is the case with cables television distribution systems. There is a synergistic effect in the use, in each circuit, of two control loops since the overall circuit has the property that one control loop predominates under one set of conditions and prevents the other control loop from operating until the correct set of conditions exists. That is to say, one control loop can reduce large differences in frequency to a specified small value at which point the other control loop can operate freely to achieve and maintain phase lock.

The phase/frequency detector 9 and the low-pass filter 10 could be replaced by an alternative form of frequency detector, if desired.

New claims filed on 5/6/79

Claims

1. A synchronous demodulation circuit including an oscillator of controllable frequency and an oscillator control circuit arranged in a phase-locked loop with the oscillator circuit to correct, within a certain range, the tuning of the oscillator circuit, wherein a further oscillator control circuit is arranged in a second control loop with the oscillator circuit to bring the oscillator frequency within the control range of the phase-locked loop in the circumstances of the tuning error being too great for the first mentioned oscillator control circuit to correct.

2. A circuit as claimed in claim 1, wherein the second control circuit includes a non-linear circuit the input/output characteristic of which includes a dead-space corresponding to the range of tuning error correctable by the first-mentioned oscillator control circuit, the non-linear circuit being external to the phase locked loop and connected to receive the output of a tuning error detector in the second control loop.

3. A circuit as claimed in claim 2, wherein the tuning error detector of the second control circuit can be a frequency detector circuit

4. A circuit as claimed in claim 3, wherein the said frequency detector circuit comprises a phase/frequency detector circuit and a low-pass filter circuit, the output of the phase/frequency detector circuit being connected to the low-pass filter circuit.

5. A circuit as claimed in claim 3 or4, wherein the frequency detector circuit has a first input arranged to receive a reference signal, an amplitude limiting circuit is arranged to supply the frequency of an incoming signal to a second input of the frequency detector circuit, and a bandpass filter circuit is commonly connected in both the phase-locked loop circuit and the second control circuit.

6. A circuit as claimed in any preceding claim, wherein a low-pass filter circuit is commonly connected in both the phase-locked loop and the second control circuit, the output of the filter circuit being connected to control the oscillator circuit.

7. A circuit as claimed in any preceding claim, wherein a summation circuit is provided and has a first input connected to the phase-locked loop, a second input connected to the second control loop, and an output connected to the filter circuit connected to control the oscillator circuit.

8. A circuit as claimed in any preceding claim, wherein the phase-locked loop includes as a tuning error detector a phase detector circuit and a phasesampling circuit arranged to supply the phase of an incoming signal and the phase of a reference signal to the phase detector circuit at instants when the amplitude of the incoming signal is known to have a reference value.

9. A circuit as claimed in any preceding claim arranged for demodulating the video content of a television signal, wherein the phase-sampling circuit is operative to sample the incoming signal at instants corresponding to the times of occurrence of the synchronisation pulses.

10. A circuit as claimed in any preceding claim, wherein the oscillator circuit is arranged to supply to a demodulation stage the reference waveform required for performing synchronous demodulation.

11. A circuit as claimed in any of claims 1 to 9, wherein a fixed frequency oscillator is provided to supply the reference waveform required for perform ing synchronous demodulation, a mixer circuit is connected to receive an incoming signal and the output of the controllable oscillator circuit as inputs, and the output of the mixer circuit is connected to a demodulation stage for synchronous demodulation with respect to the reference waveform.

12. A circuit as claimed in claim 10 or 11, wherein a vestigial sideband filter circuit is connected prior to the demodulation stage in the path of the signal to be synchronously demodulated.

13. A synchronous demodulation circuit substantially as herein described with reference to and as illustrated by Figure X of the accompanying drawings.

14. A synchronous demodulation circuit substantially as herein described with reference to and as illustrated by Figure 2 ofthe accompanying drawings.