GB202216292D0 - Region identifier based on instruction fetch address - Google Patents

Region identifier based on instruction fetch address

Info

Publication number
GB202216292D0
GB202216292D0 GBGB2216292.9A GB202216292A GB202216292D0 GB 202216292 D0 GB202216292 D0 GB 202216292D0 GB 202216292 A GB202216292 A GB 202216292A GB 202216292 D0 GB202216292 D0 GB 202216292D0
Authority
GB
United Kingdom
Prior art keywords
instruction fetch
identifier based
fetch address
region identifier
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
GBGB2216292.9A
Other versions
GB2623986A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Priority to GB2216292.9A priority Critical patent/GB2623986A/en
Publication of GB202216292D0 publication Critical patent/GB202216292D0/en
Priority to PCT/GB2023/052503 priority patent/WO2024094956A1/en
Publication of GB2623986A publication Critical patent/GB2623986A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Storage Device Security (AREA)
  • Executing Machine-Instructions (AREA)
GB2216292.9A 2022-11-02 2022-11-02 Region identifier based on instruction fetch address Pending GB2623986A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB2216292.9A GB2623986A (en) 2022-11-02 2022-11-02 Region identifier based on instruction fetch address
PCT/GB2023/052503 WO2024094956A1 (en) 2022-11-02 2023-09-27 Region identifier based on instruction fetch address

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2216292.9A GB2623986A (en) 2022-11-02 2022-11-02 Region identifier based on instruction fetch address

Publications (2)

Publication Number Publication Date
GB202216292D0 true GB202216292D0 (en) 2022-12-14
GB2623986A GB2623986A (en) 2024-05-08

Family

ID=84369814

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2216292.9A Pending GB2623986A (en) 2022-11-02 2022-11-02 Region identifier based on instruction fetch address

Country Status (2)

Country Link
GB (1) GB2623986A (en)
WO (1) WO2024094956A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7111145B1 (en) * 2003-03-25 2006-09-19 Vmware, Inc. TLB miss fault handler and method for accessing multiple page tables
GB2569358B (en) * 2017-12-15 2020-01-29 Advanced Risc Mach Ltd Code realms
GB2570474B (en) * 2018-01-26 2020-04-15 Advanced Risc Mach Ltd Region fusing
GB2578135B (en) * 2018-10-18 2020-10-21 Advanced Risc Mach Ltd Range checking instruction

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ROBERT BEDICHEK: "Some Efficient Architecture Simulation Techniques", 1990, USENIX CONFERENCE, pages: 53 - 63

Also Published As

Publication number Publication date
GB2623986A (en) 2024-05-08
WO2024094956A1 (en) 2024-05-10

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