GB202110584D0 - Cache arrangements for data processing systems - Google Patents
Cache arrangements for data processing systemsInfo
- Publication number
- GB202110584D0 GB202110584D0 GBGB2110584.6A GB202110584A GB202110584D0 GB 202110584 D0 GB202110584 D0 GB 202110584D0 GB 202110584 A GB202110584 A GB 202110584A GB 202110584 D0 GB202110584 D0 GB 202110584D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- data processing
- processing systems
- cache arrangements
- cache
- arrangements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0877—Cache access modes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
- G06F12/0895—Caches characterised by their organisation or structure of parts of caches, e.g. directory or tag array
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
- G06F12/0853—Cache with multiport tag or data arrays
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0811—Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
- G06F12/0871—Allocation or management of cache space
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0877—Cache access modes
- G06F12/0882—Page mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0877—Cache access modes
- G06F12/0886—Variable-length word access
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/60—Memory management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1041—Resource optimization
- G06F2212/1044—Space efficiency improvement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/40—Specific encoding of data in memory or cache
- G06F2212/401—Compressed data
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/45—Caching of specific data in cache memory
- G06F2212/455—Image or video data
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/60—General implementation details not specific to a particular type of compression
- H03M7/6047—Power optimization with respect to the encoder, decoder, storage or transmission
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/937,272 US11586554B2 (en) | 2020-07-23 | 2020-07-23 | Cache arrangements for data processing systems |
Publications (3)
Publication Number | Publication Date |
---|---|
GB202110584D0 true GB202110584D0 (en) | 2021-09-08 |
GB2602373A GB2602373A (en) | 2022-06-29 |
GB2602373B GB2602373B (en) | 2023-05-03 |
Family
ID=77540951
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2110584.6A Active GB2602373B (en) | 2020-07-23 | 2021-07-22 | Cache arrangements for data processing systems |
Country Status (5)
Country | Link |
---|---|
US (1) | US11586554B2 (en) |
KR (1) | KR20220012818A (en) |
CN (1) | CN113971140A (en) |
GB (1) | GB2602373B (en) |
TW (1) | TWI793644B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115080250B (en) * | 2022-08-22 | 2022-12-02 | 深圳星云智联科技有限公司 | Data processing method, device and system |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8542939B2 (en) | 2011-08-04 | 2013-09-24 | Arm Limited | Methods of and apparatus for using tree representations for representing arrays of data elements for encoding and decoding data in data processing systems |
US8990518B2 (en) | 2011-08-04 | 2015-03-24 | Arm Limited | Methods of and apparatus for storing data in memory in data processing systems |
US9014496B2 (en) | 2011-08-04 | 2015-04-21 | Arm Limited | Methods of and apparatus for encoding and decoding data in data processing systems |
US9116790B2 (en) | 2011-08-04 | 2015-08-25 | Arm Limited | Methods of and apparatus for storing data in memory in data processing systems |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5247638A (en) * | 1990-06-18 | 1993-09-21 | Storage Technology Corporation | Apparatus for compressing data in a dynamically mapped virtual data storage subsystem |
US5875454A (en) * | 1996-07-24 | 1999-02-23 | International Business Machiness Corporation | Compressed data cache storage system |
US6624761B2 (en) * | 1998-12-11 | 2003-09-23 | Realtime Data, Llc | Content independent data compression method and system |
US7143238B2 (en) * | 2003-09-30 | 2006-11-28 | Intel Corporation | Mechanism to compress data in a cache |
US8775495B2 (en) * | 2006-02-13 | 2014-07-08 | Indiana University Research And Technology | Compression system and method for accelerating sparse matrix computations |
US10474584B2 (en) * | 2012-04-30 | 2019-11-12 | Hewlett Packard Enterprise Development Lp | Storing cache metadata separately from integrated circuit containing cache controller |
JP5826114B2 (en) * | 2012-05-25 | 2015-12-02 | クラリオン株式会社 | Data decompression device, data compression device, data decompression program, data compression program, and compressed data distribution system |
GB201414204D0 (en) * | 2014-08-11 | 2014-09-24 | Advanced Risc Mach Ltd | Data processing systems |
CN104238962B (en) | 2014-09-16 | 2018-02-06 | 华为技术有限公司 | The method and device of data is write into caching |
US9652152B2 (en) * | 2014-10-29 | 2017-05-16 | Qualcomm Incorporated | Efficient decompression locality system for demand paging |
WO2016130915A1 (en) | 2015-02-13 | 2016-08-18 | Google Inc. | Transparent hardware-assisted memory decompression |
US9552163B1 (en) | 2015-07-03 | 2017-01-24 | Qualcomm Incorporated | Systems and methods for providing non-power-of-two flash cell mapping |
US9921909B2 (en) | 2015-07-03 | 2018-03-20 | Qualcomm Incorporated | Systems and methods for providing error code detection using non-power-of-two flash cell mapping |
US20170083450A1 (en) * | 2015-09-23 | 2017-03-23 | Intel Corporation | Supporting Data Conversion and Meta-Data in a Paging System |
US9880762B1 (en) | 2015-12-30 | 2018-01-30 | EMC IP Holding Company LLC | Compressing metadata blocks prior to writing the metadata blocks out to secondary storage |
US10127625B2 (en) * | 2016-05-27 | 2018-11-13 | Intel Corporation | Bandwidth-efficient lossless fragment color compression of multi-sample pixels |
US9996471B2 (en) * | 2016-06-28 | 2018-06-12 | Arm Limited | Cache with compressed data and tag |
GB2572158B (en) | 2018-03-20 | 2020-11-25 | Advanced Risc Mach Ltd | Random tag setting instruction |
GB2578924B (en) | 2018-11-14 | 2021-09-29 | Advanced Risc Mach Ltd | An apparatus and method for controlling memory accesses |
-
2020
- 2020-07-23 US US16/937,272 patent/US11586554B2/en active Active
-
2021
- 2021-06-21 TW TW110122647A patent/TWI793644B/en active
- 2021-06-21 CN CN202110687777.XA patent/CN113971140A/en active Pending
- 2021-07-16 KR KR1020210093248A patent/KR20220012818A/en not_active Application Discontinuation
- 2021-07-22 GB GB2110584.6A patent/GB2602373B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8542939B2 (en) | 2011-08-04 | 2013-09-24 | Arm Limited | Methods of and apparatus for using tree representations for representing arrays of data elements for encoding and decoding data in data processing systems |
US8990518B2 (en) | 2011-08-04 | 2015-03-24 | Arm Limited | Methods of and apparatus for storing data in memory in data processing systems |
US9014496B2 (en) | 2011-08-04 | 2015-04-21 | Arm Limited | Methods of and apparatus for encoding and decoding data in data processing systems |
US9116790B2 (en) | 2011-08-04 | 2015-08-25 | Arm Limited | Methods of and apparatus for storing data in memory in data processing systems |
Also Published As
Publication number | Publication date |
---|---|
GB2602373A (en) | 2022-06-29 |
KR20220012818A (en) | 2022-02-04 |
CN113971140A (en) | 2022-01-25 |
TWI793644B (en) | 2023-02-21 |
US20220027283A1 (en) | 2022-01-27 |
GB2602373B (en) | 2023-05-03 |
US11586554B2 (en) | 2023-02-21 |
TW202205267A (en) | 2022-02-01 |
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