GB201707182D0 - An apparatus and method for managing use of capabilities - Google Patents

An apparatus and method for managing use of capabilities

Info

Publication number
GB201707182D0
GB201707182D0 GBGB1707182.0A GB201707182A GB201707182D0 GB 201707182 D0 GB201707182 D0 GB 201707182D0 GB 201707182 A GB201707182 A GB 201707182A GB 201707182 D0 GB201707182 D0 GB 201707182D0
Authority
GB
United Kingdom
Prior art keywords
capabilities
managing use
managing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB1707182.0A
Other versions
GB2562102B (en
GB2562102A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Priority to GB1707182.0A priority Critical patent/GB2562102B/en
Publication of GB201707182D0 publication Critical patent/GB201707182D0/en
Priority to PCT/GB2018/051029 priority patent/WO2018203031A1/en
Priority to EP18721113.1A priority patent/EP3619606B1/en
Priority to JP2019558718A priority patent/JP7128206B2/en
Priority to CN201880028159.0A priority patent/CN110574009B/en
Priority to US16/606,400 priority patent/US11461128B2/en
Priority to KR1020197034493A priority patent/KR102605793B1/en
Priority to TW107115029A priority patent/TWI781170B/en
Publication of GB2562102A publication Critical patent/GB2562102A/en
Application granted granted Critical
Publication of GB2562102B publication Critical patent/GB2562102B/en
Priority to IL270245A priority patent/IL270245B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/468—Specific access rights for resources, e.g. using capability register
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/35—Indirect addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/48—Indexing scheme relating to G06F9/48
    • G06F2209/481—Exception handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Storage Device Security (AREA)
  • Advance Control (AREA)
  • Communication Control (AREA)
  • Debugging And Monitoring (AREA)
GB1707182.0A 2017-05-05 2017-05-05 An apparatus and method for managing use of capabilities Active GB2562102B (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
GB1707182.0A GB2562102B (en) 2017-05-05 2017-05-05 An apparatus and method for managing use of capabilities
KR1020197034493A KR102605793B1 (en) 2017-05-05 2018-04-19 Apparatus and method for managing the use of qualifications
EP18721113.1A EP3619606B1 (en) 2017-05-05 2018-04-19 An apparatus and method for managing use of capabilities
JP2019558718A JP7128206B2 (en) 2017-05-05 2018-04-19 Apparatus and method for managing use of features
CN201880028159.0A CN110574009B (en) 2017-05-05 2018-04-19 Apparatus and method for managing use of capabilities
US16/606,400 US11461128B2 (en) 2017-05-05 2018-04-19 Apparatus and method for managing use of capabilities
PCT/GB2018/051029 WO2018203031A1 (en) 2017-05-05 2018-04-19 An apparatus and method for managing use of capabilities
TW107115029A TWI781170B (en) 2017-05-05 2018-05-03 An apparatus and method for managing use of capabilities
IL270245A IL270245B (en) 2017-05-05 2019-10-28 An apparatus and method for managing use of capabilities

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1707182.0A GB2562102B (en) 2017-05-05 2017-05-05 An apparatus and method for managing use of capabilities

Publications (3)

Publication Number Publication Date
GB201707182D0 true GB201707182D0 (en) 2017-06-21
GB2562102A GB2562102A (en) 2018-11-07
GB2562102B GB2562102B (en) 2019-09-04

Family

ID=59065711

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1707182.0A Active GB2562102B (en) 2017-05-05 2017-05-05 An apparatus and method for managing use of capabilities

Country Status (9)

Country Link
US (1) US11461128B2 (en)
EP (1) EP3619606B1 (en)
JP (1) JP7128206B2 (en)
KR (1) KR102605793B1 (en)
CN (1) CN110574009B (en)
GB (1) GB2562102B (en)
IL (1) IL270245B (en)
TW (1) TWI781170B (en)
WO (1) WO2018203031A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2563580B (en) * 2017-06-15 2019-09-25 Advanced Risc Mach Ltd An apparatus and method for controlling a change in instruction set
GB2564130B (en) 2017-07-04 2020-10-07 Advanced Risc Mach Ltd An apparatus and method for controlling execution of instructions
GB2592069B (en) * 2020-02-17 2022-04-27 Advanced Risc Mach Ltd Address calculating instruction
GB2600715B (en) * 2020-11-05 2023-01-18 Advanced Risc Mach Ltd Technique for constraining access to memory using capabilities
GB2603157B (en) * 2021-01-28 2023-05-03 Advanced Risc Mach Ltd Key capability storage
GB2606355B (en) * 2021-05-04 2023-09-13 Advanced Risc Mach Ltd Technique for constraining access to memory using capabilities
CN115794681B (en) * 2022-10-12 2023-05-23 中国人民解放军军事科学院国防科技创新研究院 Multi-stage expandable TLB system suitable for RISC-V and address translation method thereof

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS625441A (en) * 1985-02-18 1987-01-12 Nec Corp Information processor
US4809160A (en) * 1985-10-28 1989-02-28 Hewlett-Packard Company Privilege level checking instruction for implementing a secure hierarchical computer system
EP1429246A1 (en) * 2002-12-13 2004-06-16 Sun Microsystems, Inc. Apparatus and method for switching mode in a computer system
US8479195B2 (en) * 2007-05-16 2013-07-02 Vmware, Inc. Dynamic selection and application of multiple virtualization techniques
US20090182984A1 (en) 2008-01-11 2009-07-16 International Business Machines Corporation Execute Relative Long Facility and Instructions Therefore
GB2478733B (en) * 2010-03-15 2013-08-14 Advanced Risc Mach Ltd Apparatus and method for handling exception events
GB2482700A (en) * 2010-08-11 2012-02-15 Advanced Risc Mach Ltd Memory access control
GB2483907A (en) * 2010-09-24 2012-03-28 Advanced Risc Mach Ltd Privilege level switching for data processing circuitry when in a debug mode
US9116711B2 (en) * 2012-02-08 2015-08-25 Arm Limited Exception handling in a data processing apparatus having a secure domain and a less secure domain
GB2501343A (en) * 2012-02-08 2013-10-23 Advanced Risc Mach Ltd Data processing apparatus and method using secure domain and less secure domain
GB201217531D0 (en) 2012-10-01 2012-11-14 Advanced Risc Mach Ltd ARMv7-M Asset Protection Proposal
JP6106765B2 (en) * 2013-02-05 2017-04-05 エイアールエム リミテッド Guest operating system that supports virtualization using a memory protection unit
US9864708B2 (en) 2014-12-16 2018-01-09 Vmware, Inc. Safely discovering secure monitors and hypervisor implementations in systems operable at multiple hierarchical privilege levels
GB2535514B (en) * 2015-02-19 2021-09-22 Advanced Risc Mach Ltd Processor exception handling
GB2540206B (en) * 2015-07-10 2018-02-07 Advanced Risc Mach Ltd Apparatus and method for executing instruction using range information associated with a pointer
GB2540944B (en) * 2015-07-31 2018-02-21 Advanced Risc Mach Ltd Vector operand bitsize control
GB2541714B (en) * 2015-08-27 2018-02-14 Advanced Risc Mach Ltd An apparatus and method for controlling instruction execution behaviour
JP2017045303A (en) * 2015-08-27 2017-03-02 ファナック株式会社 Controller that can detect causes of abnormalities in functions of personal computer
US10558582B2 (en) * 2015-10-02 2020-02-11 Intel Corporation Technologies for execute only transactional memory
GB2544315B (en) * 2015-11-12 2018-02-14 Advanced Risc Mach Ltd An apparatus and method for controlling use of bounded pointers
GB2544996B (en) * 2015-12-02 2017-12-06 Advanced Risc Mach Ltd An apparatus and method for managing bounded pointers

Also Published As

Publication number Publication date
TWI781170B (en) 2022-10-21
JP7128206B2 (en) 2022-08-30
EP3619606B1 (en) 2023-12-27
KR102605793B1 (en) 2023-11-24
WO2018203031A1 (en) 2018-11-08
GB2562102B (en) 2019-09-04
EP3619606A1 (en) 2020-03-11
US11461128B2 (en) 2022-10-04
CN110574009B (en) 2023-09-26
IL270245B (en) 2022-04-01
TW201843584A (en) 2018-12-16
KR20200005568A (en) 2020-01-15
JP2020518910A (en) 2020-06-25
US20200133710A1 (en) 2020-04-30
GB2562102A (en) 2018-11-07
CN110574009A (en) 2019-12-13

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