GB201209258D0 - Digital signal routing circuit - Google Patents
Digital signal routing circuitInfo
- Publication number
- GB201209258D0 GB201209258D0 GB201209258A GB201209258A GB201209258D0 GB 201209258 D0 GB201209258 D0 GB 201209258D0 GB 201209258 A GB201209258 A GB 201209258A GB 201209258 A GB201209258 A GB 201209258A GB 201209258 D0 GB201209258 D0 GB 201209258D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- data
- multiply
- digital
- sample clock
- digital signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H60/00—Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
- H04H60/02—Arrangements for generating broadcast information; Arrangements for generating broadcast-related information with a direct linking to broadcast information or to broadcast space-time; Arrangements for simultaneous generation of broadcast information and broadcast-related information
- H04H60/04—Studio equipment; Interconnection of studios
Abstract
An integrated circuit 39 is used for digital signal mixing of audio data samples from analogue and digital inputs 56, 62 to generate outputs 70, 74. The integrated circuit also includes a plurality of digital signal processing (DSP) blocks, which can act as data sources and data destinations. The digital mixing core 50 includes a multiply-accumulate block which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Multiple signal paths can be defined by configuration data supplied to the device, either by a user, or by software. The multiply-accumulate block operates on a time division multiplexed basis clocked by a system clock whose frequency is controlled based upon the number of signal paths through the mixer to be less than that required to generate output data for every destination from every source. Multiple signal paths can be processed within one period of the sample clock. Each signal path has a respective sample clock rate, and paths with different sample clock rates can be routed through the multiply-accumulate block on a time division multiplexed basis independently of each other.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB201109009A GB201109009D0 (en) | 2011-05-27 | 2011-05-27 | Digital signal routing circuit |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB201209258D0 true GB201209258D0 (en) | 2012-07-04 |
| GB2491263A GB2491263A (en) | 2012-11-28 |
| GB2491263B GB2491263B (en) | 2014-08-06 |
Family
ID=44310558
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB201109009A Ceased GB201109009D0 (en) | 2011-05-27 | 2011-05-27 | Digital signal routing circuit |
| GB201209259A Active GB2491264B (en) | 2011-05-27 | 2012-05-25 | Digital signal routing circuit |
| GB201209258A Active GB2491263B (en) | 2011-05-27 | 2012-05-25 | Digital signal routing circuit |
Family Applications Before (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB201109009A Ceased GB201109009D0 (en) | 2011-05-27 | 2011-05-27 | Digital signal routing circuit |
| GB201209259A Active GB2491264B (en) | 2011-05-27 | 2012-05-25 | Digital signal routing circuit |
Country Status (1)
| Country | Link |
|---|---|
| GB (3) | GB201109009D0 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20220058236A (en) * | 2020-10-30 | 2022-05-09 | 삼성전자주식회사 | Apparatus and method for processing an audio data |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5483528A (en) * | 1994-10-11 | 1996-01-09 | Telex Communications, Inc. | TDM digital matrix intercom system |
| US7489978B2 (en) * | 2001-04-23 | 2009-02-10 | Yamaha Corporation | Digital audio mixer with preview of configuration patterns |
| JP3744440B2 (en) * | 2002-02-28 | 2006-02-08 | ヤマハ株式会社 | Mixing device, musical tone generator, and large-scale integrated circuit for mixing |
| US7526350B2 (en) * | 2003-08-06 | 2009-04-28 | Creative Technology Ltd | Method and device to process digital media streams |
| EP2320584A1 (en) * | 2007-03-28 | 2011-05-11 | Yamaha Corporation | Mixing signal processing apparatus and mixing signal processing integrated circuit |
| WO2009097009A1 (en) * | 2007-08-14 | 2009-08-06 | Personics Holdings Inc. | Method and device for linking matrix control of an earpiece |
| US8200479B2 (en) * | 2008-02-08 | 2012-06-12 | Texas Instruments Incorporated | Method and system for asymmetric independent audio rendering |
| US20100056050A1 (en) * | 2008-08-26 | 2010-03-04 | Hongwei Kong | Method and system for audio feedback processing in an audio codec |
| US9883271B2 (en) * | 2008-12-12 | 2018-01-30 | Qualcomm Incorporated | Simultaneous multi-source audio output at a wireless headset |
-
2011
- 2011-05-27 GB GB201109009A patent/GB201109009D0/en not_active Ceased
-
2012
- 2012-05-25 GB GB201209259A patent/GB2491264B/en active Active
- 2012-05-25 GB GB201209258A patent/GB2491263B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| GB201109009D0 (en) | 2011-07-13 |
| GB2491264B (en) | 2014-08-20 |
| GB2491263B (en) | 2014-08-06 |
| GB201209259D0 (en) | 2012-07-04 |
| GB2491264A (en) | 2012-11-28 |
| GB2491263A (en) | 2012-11-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) |
Free format text: REGISTERED BETWEEN 20150820 AND 20150826 |