GB201206533D0 - Efficient network and memory architecture for multi-core data processing system - Google Patents

Efficient network and memory architecture for multi-core data processing system

Info

Publication number
GB201206533D0
GB201206533D0 GBGB1206533.0A GB201206533A GB201206533D0 GB 201206533 D0 GB201206533 D0 GB 201206533D0 GB 201206533 A GB201206533 A GB 201206533A GB 201206533 D0 GB201206533 D0 GB 201206533D0
Authority
GB
United Kingdom
Prior art keywords
data processing
processing system
memory architecture
core data
efficient network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB1206533.0A
Other versions
GB2490036A (en
GB2490036B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SANDSTROM MARK H
Original Assignee
SANDSTROM MARK H
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/184,028 external-priority patent/US20120079501A1/en
Priority claimed from US13/270,194 external-priority patent/US8490111B2/en
Application filed by SANDSTROM MARK H filed Critical SANDSTROM MARK H
Publication of GB201206533D0 publication Critical patent/GB201206533D0/en
Publication of GB2490036A publication Critical patent/GB2490036A/en
Application granted granted Critical
Publication of GB2490036B publication Critical patent/GB2490036B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
GB1206533.0A 2011-04-16 2012-04-13 Efficient network and memory architecture for multi-core data processing system Expired - Fee Related GB2490036B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201161476268P 2011-04-16 2011-04-16
US13/184,028 US20120079501A1 (en) 2010-09-27 2011-07-15 Application Load Adaptive Processing Resource Allocation
US201161539616P 2011-09-27 2011-09-27
US13/270,194 US8490111B2 (en) 2011-04-16 2011-10-10 Efficient network and memory architecture for multi-core data processing system

Publications (3)

Publication Number Publication Date
GB201206533D0 true GB201206533D0 (en) 2012-05-30
GB2490036A GB2490036A (en) 2012-10-17
GB2490036B GB2490036B (en) 2013-05-22

Family

ID=46209024

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1206533.0A Expired - Fee Related GB2490036B (en) 2011-04-16 2012-04-13 Efficient network and memory architecture for multi-core data processing system

Country Status (1)

Country Link
GB (1) GB2490036B (en)

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3551892A (en) * 1969-01-15 1970-12-29 Ibm Interaction in a multi-processing system utilizing central timers
US4402046A (en) * 1978-12-21 1983-08-30 Intel Corporation Interprocessor communication system
IT1126475B (en) * 1979-12-03 1986-05-21 Honeywell Inf Systems COMMUNICATION APPARATUS BETWEEN MORE PROCESSORS
FR2549621B1 (en) * 1983-07-19 1988-09-16 Telecommunications Sa MULTIPROCESSOR SYSTEM FOR COMMUNICATION OF PROCESSORS BETWEEN THEM
DE3340123A1 (en) * 1983-11-05 1985-05-15 Helmut Dipl.-Inform. 5860 Iserlohn Bähring Communications unit for coupling microcomputers
US5961606A (en) * 1997-06-30 1999-10-05 Sun Microsystems, Inc. System and method for remote buffer allocation in exported memory segments and message passing between network nodes
US6769017B1 (en) * 2000-03-13 2004-07-27 Hewlett-Packard Development Company, L.P. Apparatus for and method of memory-affinity process scheduling in CC-NUMA systems
WO2004099981A1 (en) * 2003-05-09 2004-11-18 Fujitsu Limited Program load method, load program, and multi-processor
US8370448B2 (en) * 2004-12-28 2013-02-05 Sap Ag API for worker node retrieval of session request
WO2007037006A1 (en) * 2005-09-29 2007-04-05 Fujitsu Limited Multi-core processor
US9170864B2 (en) * 2009-01-29 2015-10-27 International Business Machines Corporation Data processing in a hybrid computing environment

Also Published As

Publication number Publication date
GB2490036A (en) 2012-10-17
GB2490036B (en) 2013-05-22

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20200413