GB1600851A - Overspeed protection apparatus - Google Patents

Description

(54) OVERSPEED PROTECTION APPARATUS (71) We, FIDUS CONTROLS LIMITED, a British Company, of Heddon Way, Middlefields Industrial Estate, South Shields, Tyne & Wear, NE34 ONT, formerly of Newmol House, 80-86 Elswick Road, Newcastle upon Tyne, NE4 6JJ, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to overspeed protection apparatus and its provision in a vehicle having change speed gears for preventing damage occasioned by their abuse.

An object of the invention is to preserve the geared transmission systems of an automotive vehicle from the damaging effects of the driver selecting a gear which is too low for the speed of the vehicle; such crashing of gears has heretofore considerably reduced the available transport capacity from omnibus depots on account of the time required for consequent replacement of components and maintenance during which a vehicle is out of service.

According to the invention there is provided overspeed protection apparatus as defined in claim 1 hereinafter.

Vehicle speed sensing is achieved preferably by measuring the rotational speed of the propeller shaft. A probe is located adjacent to the bolt-heads used in one of the propeller shaft couplings flanges. A signal in the form of a train of pulses is delivered by the probe to electronic circuitry which determines whether any one or more of a plurality of "enable" gear signals shall be produced.

A preferred embodiment of the invention will now be described with reference to the accompanying drawings wherein: Fig. 1 is a circuit diagram of part of a gear change control embodying the present invention, the circuit being responsive to speedrelated pulses from a probe and pulse shaping circuit; Fig. 2 is a detail of Fig. I showing the circuitry of one of the subsidiary circuits, B, shown in Fig. 1, subsidiary circuits A, C and D being identical; Fig. 3 is a circuit diagram of a pulse shaping circuit with a speed-sensing probe, intended to be connected to the circuit of Fig.

1; Fig. 4 is a diagram showing the mounting of the probe of Fig. 3 in relation to a rotating part of the vehicle drive; Fig. 5 is a graphical representation of wave forms of pulses appearing at various points in the circuits of Figs. 2 and 3 when the speed of the vehicle is greater than the speed set for selected gear; and Fig. 6 is a graphical representation of wave forms of the pulses produced at the same points as for Fig. 5, when the speed of the vehicle is lower than the speed set for a selected gear.

In the circuit diagrams of Figs. 1, 2 and 3 all components prefixed 'R' are resistors all prefixed 'D' are diodes, all prefixed 'C' are capacitors, and all prefixed 'TR' are transistors.

In Fig. 4, there is schematically shown a gear box 110, the gear box output shaft 111 carrying a flange 112, and a universal joint 113 for driving the prop-shaft of the vehicle.

The flange 112 carries a plurality of studs 114 in the form of bolt heads. A probe 115 is located adjacent the flange 112 and spaced such that the studs 114, but not the periphery of the flange 112, enter its effective sensing field. The probe 115 is responsive to disturbances of its magnetic environment in that it provides a high level of voltage when a stud 114 is within its field, and a lower level when there is no stud within its field.

The output of the probe is shown as trace 1 in Fig. 5 and trace 1' in Fig. 6 which show the characteristic square form of the pulses generated by the probe 115. The pulse duration tl, of the pulses in Fig. 5 is shorter than the duration tl' of Fig. 6, due to the shorter dwell of the stud 114 in the field of the probe 115. Similarly the pulse repetition time is shorter the faster the rotation of the shaft 111, which thus governs the frequency of the pulses. The repetition times in Figs. 5 and 6 are t2 and t2, respectively.

A particular plurality of studs 114 is shown on flange 112, but this number can obviously vary, and is related to the maximum frequency which the circuitry can cope with and the speed of the output shaft 111 when the vehicle is travelling at its fastest.

Fig. 3 shows a pulse shaping circuit which is connected to the output of probe 115, and between supply lines 103, 104, and comprises a pair of cascaded transistors TR 11 and TR12, and an integrated circuit IC5, and includes a diode D4 1 coupling the circuit IC5 to the transistors TRII, TR12, and a diode D40 between IC5 and a further transistor TRIO. The effect of the pulse shaping circuit is to chp the probe pulses to produce short peaked pulses of the same duration no matter what their frequency is, each synchronised with the trailing edge of the respective pulse produced by probe 115, and appearing across resistor R51. The wave form of these short pulses is shown as trace 2 in Fig. 5 and trace 2' in Fig. 6.

The pulse shaping circuit of Fig. 3 provides a more convenient speed sensing signal for the remainder of the circuitry and includes means which give an indication if the speed probe output wiring is faulty. These warning means will now be described. The speed measuring probe is biased by a resistor R57 and D41 so that its terminal voltage varies between approximately 10 v (when metal is present in the sensing zone) and 4 volts (when no metal present). Should the wiring to the probe go open-circuit, then the terminal No. 16 (feed to probe +) will rise to 12 volts, which is the voltage on the line 103, and Tor 11 will become reverse biased via the base feed through a resistor R59. Nonconduction of TR 11 allows Tor 12 to become forward biased by allowing base current to flow through resistors R60 and R62. Conduction of Tor 12 illuminates the an indicator 116 to inform the vehicle operator that the unit is not protecting the vehicle from an overspeed- ing condition, i.e. any gear can be selected at any speed.

IC5 is an operational amplifier which is biased so that a change in the speed sensing probe output causes a similar change in the output of the amplifier (pin 6). The rise time of the output from the amplifier is very much more sharply defined than the input signal.

The output of the amplifier is fed via D40 and R53 into an inverter circut. Since only short synchronization pulses are required into four comparator circuits A, B, C and D (Fig. 1) to which the circuit of Fig. 3 is connected, the output from TR10 must be capacitor coupled. On conduction of TRIO, the coupling capacitor C9 is discharged via TR 10 and a diode D42 shown in Fig. 1. As transistor TR 10 becomes non-conductive with every input signal from the speed sensing probe 115, C9 charges via R51 and R52. Hence for every probe signal the voltage across R51 rises steeply and then falls on a time constant dependant upon the value of C9, R52 and R51. The time constant is made very small (in the region of 100 microseconds) so that a sharp positive pulse is fed via four diodes respectively into timing circuits in the four comparator circuits A, B, C and D.

The pulse form appearing across R51 is applied via a line 106, shown in Figs. 1 and 2, to each of the comparator circuits A, B, C and D, one being provided for each higher speed gear selectable.

One of the comparator circuits is shown in detail in Fig. 2, this particular circuit being B, relating to the selection of 2nd gear. Each comparator circuit A-D includes an integrated circuit, e.g. IC2 in circuit B.

Integrated circuit IC2 is a timer circuit which is connected with further components to form an astable multivibrator which is synchronized by a transistor TR3. Timing components included in the astable multivibrator are R25, R26, R27, R66 and C5.

Consider a typical sequence when the vehicle speed is low. TR3 is brought into conduction by a synchronizing input i.e. a pulse from R51 via line 106, a diode D32 and a resistor R30 produced as previously described. Due to TR3 conduction, C5 is discharged to Zero volts and the output at pin 3 of IC2 is high (approximately 12 volts). At the end of the synchronizing input, Tr3 returns to the nonconducting mode and capacitor C5 starts to charge via R25, R26, R27 and R66 on a predetermined time constant. The integrated circuit IC2 is such that when pin 6 to which the capacitor C5 is connected reaches 2/3 of the supply voltage on the line 103, the output pins 3 and 7 fall to zero volts and C5 is therefore discharged via R66 on the short time constant C5 and R66. Discharge of C5 continues until its voltage reaches 1/3 of the supply voltage at which point pin 3 reverts to the high state and C5 stops discharging. The resultant wave forms at pins 6 and 3 are illustrated by traces 3' and 4' of Fig. 6.

The above described condition i.e. IC2 astable timing sequence occuring before the next synchronizing pulse arrives, allows a change in state of the integrated circuit output pin 3. The speed of the vehicle is therefore lower than the set speed determined by the timing circuit of comparator circuit B.

However, if a synchronizing pulse via D32 arrives before the voltage on C5 rises to 2/3 of the supply voltage then capacitor C5 is discharged via Tr3 and the output pin 3 of the timer integrated circuit IC2 will stay high, as illustrated by traces 3 and 4 of Fig. 5.

It can therefore be seen that this circuit B is basically a time comparator whose output will only change if the time between speed pulses is longer that its own characteristic time period.

The circuitry is such that even if fluctuations in the electric power supply are experienced, the timing period is not affected, as it depends only upon a constant proportion of the supply potential. The charge path to C5 is arranged through the network of resistors R25, R26, R27 and R66 connected in series and parallel combinations so that fixed value resistors can be used easily to vary the timing period. The purpose of using fixed value resistors is to prevent as far as possible tampering by unskilled or unauthorised per sopnel.

The output at pin 3 of IC2 is converted into thyristor gating impulses by an amplifier transistor TR4. The characteristic of a thyristor such as the thyristor SCR4 to which circuit B is coupled (see Fig. 1) is such that if its gate potential is raised with respect to its cathode then it will conduct via the path anode to cathode and remain in conduction even when the gating impulse is removed. Non-conduction of a thyristor is achieved only by reducing the current through the device below its characteristic holding current for a period longer than its characteristic turn-off time (in the region loots).

Should pin 3 of IC2 remain high (speed higher than set speed) Tr4 is in conduction and no current can flow into SCR4 gate via R69 and D12. As soon as pin 3 of IC2 changes state (speed lower than set speed) then the base drive to TR4 via D30 and R29 is removed and TR4 will become nonconductive. Current will flow from the supply line 103 via R32, R69 and D12 into the gate of SCR4. SCR4 will then conduct via R9 and RL3 coil if a switch SW2 is closed.

Each of the timing circuits functions in the way described but their characteristic timing sequences are set differently. The timer circuit of circuit D will be set at a shorter timing period than the timer circuit of circuit C, and so on. The gating impulses to SCR4 SCRS and SCR6 are supplied respectively by the circuits B, C and D. SCRI and SCR2 are both coupled to receive gating impulses from the circuit A. Since SCRI and SCR2 are gated simultaneously when 1st gear is selected by closure of a switch SWI, resistors R2 and R3 act as sharing networks to ensure that sufficient gating power is received by both thyristors.

The part of the circuit associated with TR9 (Fig. 1) is included to inhibit the thyristor gating pulses during the rise time of the supply lines 103 and 104. If the vehicle main switch were to be recycled during an overspeeding condition and thyristor triggering pulses were not prevented then wrong gear actuation could occur.

During the rise time of the supply voltage lines 103 and 104, a capacitor C8 charges via R50 which maintains TR9 in conduction for the charge time period of C8. Conduction of TR9 effectively brings the respective thyristor gating drive transistors of the circuits A, B, C and D into conduction via a line 105 and four respective diodes in the circuits A, B, C, and D, thus preventing gating inipulses to the thyristors. For example a diode D3 1 couples the line 105 to the transistor TR4 through a resistor R29 in circuit B as shown in Fig. 2.

The circuit of Fig. 1 includes six relays whose function is to operate each of the gears and to lockout the forward gears when the vehicle has been in reverse. The relay designations are as follows: RL1--operates both 1st and Reverse gears RL2-locks out 2nd, 3rd, 4th, and 5th gears when vehicle has been in Reverse gear RL3perates 2nd gear RL4operates 3rd gear RLS--operates 4th gear RL6H)perates 5th gear Switches designated SW1 to SW5 and RSW are the switches provided on the vehicle in the gear selector switch unit.

In a sequence of operation when the vehicle is at rest and the gear selector switch is in the 1st gear position i.e. SW1 is closed, as there is no rotation of the output shaft 111 signals appear at the gate terminals of thristors SCR1, SCR2 and SCR4 to SCR6 inclusive tending to turn on the devices. As only SWl is closed the anode of SCR1 will rise will rise to the voltage +VBB of the positive supply line 100 via diode D4 and coil RL 1. The thyristor SCR1 therefore conducts and current will flow into its anode via coil RL1 and resistor R1.

Resistor R1 is provided in parallel with coil RL 1 to ensure that the current through SCR1 is greater than the device's latching current during the time that its gate signal is present. The current through RL 1 coil builds up exponentially very quickly and the relay RLI becomes energised. The relay RLI controls two sets of contacts RL 1 - 1 and RL 1 - 2 which are shown in the positions for the deenergised state of the coil RL 1 in Fig. 1.

Both sets of contacts RLl-1 and RL1-2 are operated on energisation of the coil RL 1 but current flows only via RL1-2 from the 1st gear selector switch SW1 into a 1st gear solenoid 1 which when thus energised allows air to flow into the vehicle's gearbox to energise the 1st gear.

The vehicle will then move off at a speed dependant upon the vehicle's accelerator position and at some time later the vehicle operator will want to select 2nd gear. 2nd gear is selected by taking the gear select switch from the 1st gear position and putting it into the 2nd gear position. This action opens the switch SW1 and closes the switch SW2. Due to the physical design of the gear selector switch, the switch SWI is broken before SW2 is made. As SW1 is broken SCRI loses its anode supply and returns to the non-conducting condition whilst SCR4 becomes forward biased via the path SW2 and RL3 or R9.

The vehicle will be moving at a speed at which gating impulses are still being supplied to SCR4 and so SCR4 conducts thereby energising relay coil RL3. A resistor R9 is again provided to allow the anode current of SCR4 to achieve latching current value immediately since the current through RL coil rises relatively slowly. Energising coil RL3 changes over contacts RL3-1, to allow current flow from SW2 to the 2nd gear solenoid 2. Second gear is thus engaged and the vehicle can increase speed in second gear.

Similarly, subsequent closure of SW3 allows 3rd gear and then closure of SW4 allows 4th gear to be engaged. When the switch SW5 is closed current flows immediately in the coil of relay RL6 and 5th gear 5 is operated since the circuit for the relay RL6 is completed through a diode D24, and energisation of RL6 closes contacts RL6-1.

The sequence of operation so far has been normal, i.e. the gear actually operated has been the one selected. Under normal conditions this should occur. On the downchange sequence again the vehicle gear should always be the gear that is selected, but the selected gear may be too low for the road speed of the vehicle. In a typical overspeeding situation the vehicle road speed is so high that no gating impulses are supplied to SCR1, SCR2 and SCR4 to SCR6 inclusive and the vehicle has been in fifth gear and 1st gear is selected.

As there are no impulses to SCR1, SCR2, SCR4, SCRS or SCR6 inclusive, RLI cannot be energised on closure of SW1. However, a current path through D5, RL3-1, D13, D18, RL5-1 and D23 allows relay RL6 to remain energised and therefore 5th gear is held giving normal drive for the existing road speed.

When the road speed is at a safe level for the operation of 4th gear, gating impulses is delivered to SCR6. Consequently, if the vehicle slows to this critical level, RL5 will be energised by the conduction of SCR6 and RL6 will be de-energised due to the changing over of the contacts RL5-1. Therefore at the set speed for 4th gear, 5th gear solenoid 5 will be de-energised and 4th gear solenoid 4 will be automatically energised through SW1, D5, RL3-1, D13, RL4-1, D18 and RL5-1.

The described set speed or safe speed for engergising 4th gear solenoid 4 is chosen to be approximately the same speed as the vehicle could attain in 4th gear with the vehicle's governor limiting the speed. It is possible however to either increase or decrease this set speed level, but the following results could be experienced. If the set speed were too high then at the point of 4th gear actuation the vehicle inertia would tend to overspeed the engine, and if the set speed were too low then the possibility of engine braking would be lost.

The system remains in 4th gear until the vehicle speed is brought down to a level at which a signal allowing conduction of SCRS is achieved and RL4 is energised. The energising of RL4 allows 3rd gear operation after de-energising 4th gear solenoid 4. Again the speed allowing 3rd gear operation is chosen to be approximately governor speed.

If the vehicle is slowed further then 2nd gear will be allowed, and then when the vehicle speed is very low ie.. less than 1 m.p.h. 1st gear is allowed. The relay circuitry thus controlled therefore only allows the correct forward gear to be energised in the appropriate road speed band whilst always maintaining a drive gear for safety reasons. It is also seen that the sytem will only sequence down as far as the gear selected i.e. if 2nd gear is selected then 1st gear cannot be attained since the switch SWI is open.

However if the driver selects reverse gear position when the vehicle is in motion in either direction then no gear will be allowed and the vehicle will have no driving force until the vehicle is brought substantially to rest via the vehicle braking system. Then, at almost standstill (less than Imph), a signal will be supplied to SCRI gate and RLI can be energised, since the switch RSW is closed, giving reverse gear operation.

It is advantageous to the vehicle for the forward gears to be locked out for a certain length of time after the vehicle has been in reverse gear. 1st gear is only allowed at substantially standstill but 2nd gear etc. may be energised at higher speeds than are normally experienced in the reverse direction. If a change to say 2nd gear were allowed when the vehicle was travelling in the reverse direction an enormous strain would be experienced by the whole of the vehicle drive chain. Therefore the system is arranged to allow forward gears under the following conditions when the vehicle has been in reverse gear.

First gear solenoid 1 or 2nd gear solenoid 2 may be energised only when the vehicle has been brought to a standstill. For added protection reverse gear cannot be held during an over-speeding condition as this is dangerous. If it were held with the gear selector switch in 1st gear position then the operator could accelerate assuming 1st gear operation.

This part of the circuitry operates in the following manner.

As reverse gear solenoid R is energised SCR3 is gated via C2 and R8 allowing RL2 to become energised. The contacts of RL2 open and thereby prevent RL3 to RL6 being energised and thus inhibit 2nd to 5th gear operation. When 1st or 2nd gear selector switch SWl or SW2 is closed, a positive supply is fed via D42 or D43 to the anode of SCR2 charging C10 in the direction making the voltage at the plate of the capacitor C10 connected to the anode of SCR2 rise until gating impulses to SCR2 fire SCR2. SCR2 anode voltage thereupon falls. The drop in voltage is coupled through the capacitor C10 and commutates SCR3 to de-energise RL2.

RL3 or RL1 is energised dependant upon the selection of either SWI or SW2. Normal operation can then commence.

On four speed units the components related to RL6 are removed and SCR6 is replaced by a diode arranged in the same biased mode as SCR6. D43 is omitted so that only 1st gear can be selected following a reverse gear operation.

Diodes D5, D13, D18 and D23 allow only higher gears than those selected being energised in an overspeeding condition. Diodes Dl, D2, D14, D15, D19 and D22 are included to prevent high inductive transients being induced when the relative gear solenoids are de-energised.

The speed sensing circuitry and thyristor triggering circuits A, B, C and D are supplied by a 12 volt supply stabilised by components C3 and Z1. Zl is a zener diode which stabilises the voltage to maintain a 12 volt level. C3 is included to de-couple transient high current from the supply line to prevent the line from dipping. Components D26, R15 and R16 form a dropper network to reduce the usual 24v supply to the 12v stabilised line.

The actual operation of the appropriate gear solenoids may be achieved in various ways e.g. relay contacts or through solid-state swtiches. If the vehicle were to be travelling at a speed giving the input signal 1 shown in Fig. 5, and the second gear is selected, since none of the timers goes astable in less than the time t2, the logic will therefore maintain the highest gear, say fifth gear. In the embodiment described hereinbefore, the gear solenoids I to 5 are electro-pneumatic valve solenoids.

It should be noted that the Fig. 1 and Fig.

3 circuits are interconnected at points 14, 15 as well as along lines 103, 104.

WHAT WE CLAIM IS: 1. Overspeed protection apparatus for use in a motor vehicle having a plurality of selectable gears with different ratios, the apparatus comprising a vehicle speed sensing circuit which in use is arranged to produce electrical pulses at a rate proportional to vehicle speed, a plurality of timing circuits each of which is so coupled to the speed sensing circuit as substantially to compare the length of the pulse repetition time defined by each two consecutive pulses produced by the speed sensing circuit with a respective predetermined time interval and is such as to produce a respective gear inhibiting output if the compared length of time is shorter than the respective predetermined interval, and to produce a respective gear enabling output if the said compared length of time is longer than the respective predetermined time interval, and selector circuitry including manually operable switching means for selecting a gear to be engaged, the timing circuits being so coupled to the selector circuitry than in use a gear selected by operation of the manually operable switching means and associated through the selector circuitry with a respective one of the timing circuits is engaged only if the respective timing circuit is producing the respective gear enabling output, whereby overspeeding in the respective gear is prevented.

2. Overspeed protection apparatus according to claim 1, wherein the manually operable switching means includes means for selecting a reverse gear to be engaged and the timing circuit having the longest predetermined time interval is so coupled to the selector circuitry as to control selection of both the lowest forward gear and the reverse gear.

3. Overspeed protection apparatus according to claim 2, wherein the selector circuitry includes means for delaying engagement of a selected forward gear higher than the lowest forward gear until a predetermined delay time has elapsed from disengagement of the reverse gear.

4. Overspeed protection apparatus according to any. preceding claim, wherein for each gear associated in use with a respective one of the timing circuits a thyristor is so included in the selector circuitry that a path for current through the thyristor is controlled by the manually operable switching means in accordance with whether or not the associated gear is selected for engagement, and the supplying of gating impulses to the thyristor is controlled in accordance with which output is produced by the respective timing circuit.

5. Overspeed protection apparatus according to any preceding claim, wherein the speed sensing circuit includes a probe which is so influenced by disturbance of its magnetic environment as to provide a higher level of output signal when a body of ferromagnetic material is present in its effective field than when no such body is present.

6. Overspeed protection apparatus according to Claim 5, wherein the said probe is, in use, mounted adjacent a flange arranged to rotate with the prop shaft of the vehicle, the flange carrying one or more studs of ferro-magnetic material, and the probe being so spaced from the flange that the or each

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (7)

1. **WARNING** start of CLMS field may overlap end of DESC **.

   energised and thus inhibit 2nd to 5th gear operation. When 1st or 2nd gear selector switch SWl or SW2 is closed, a positive supply is fed via D42 or D43 to the anode of SCR2 charging C10 in the direction making the voltage at the plate of the capacitor C10 connected to the anode of SCR2 rise until gating impulses to SCR2 fire SCR2. SCR2 anode voltage thereupon falls. The drop in voltage is coupled through the capacitor C10 and commutates SCR3 to de-energise RL2.

   RL3 or RL1 is energised dependant upon the selection of either SWI or SW2. Normal operation can then commence.

   On four speed units the components related to RL6 are removed and SCR6 is replaced by a diode arranged in the same biased mode as SCR6. D43 is omitted so that only 1st gear can be selected following a reverse gear operation.

   Diodes D5, D13, D18 and D23 allow only higher gears than those selected being energised in an overspeeding condition. Diodes Dl, D2, D14, D15, D19 and D22 are included to prevent high inductive transients being induced when the relative gear solenoids are de-energised.

   The speed sensing circuitry and thyristor triggering circuits A, B, C and D are supplied by a 12 volt supply stabilised by components C3 and Z1. Zl is a zener diode which stabilises the voltage to maintain a 12 volt level. C3 is included to de-couple transient high current from the supply line to prevent the line from dipping. Components D26, R15 and R16 form a dropper network to reduce the usual 24v supply to the 12v stabilised line.

   The actual operation of the appropriate gear solenoids may be achieved in various ways e.g. relay contacts or through solid-state swtiches. If the vehicle were to be travelling at a speed giving the input signal 1 shown in Fig. 5, and the second gear is selected, since none of the timers goes astable in less than the time t2, the logic will therefore maintain the highest gear, say fifth gear. In the embodiment described hereinbefore, the gear solenoids I to 5 are electro-pneumatic valve solenoids.

   It should be noted that the Fig. 1 and Fig.

   3 circuits are interconnected at points 14, 15 as well as along lines 103, 104.

   WHAT WE CLAIM IS: 1. Overspeed protection apparatus for use in a motor vehicle having a plurality of selectable gears with different ratios, the apparatus comprising a vehicle speed sensing circuit which in use is arranged to produce electrical pulses at a rate proportional to vehicle speed, a plurality of timing circuits each of which is so coupled to the speed sensing circuit as substantially to compare the length of the pulse repetition time defined by each two consecutive pulses produced by the speed sensing circuit with a respective predetermined time interval and is such as to produce a respective gear inhibiting output if the compared length of time is shorter than the respective predetermined interval, and to produce a respective gear enabling output if the said compared length of time is longer than the respective predetermined time interval, and selector circuitry including manually operable switching means for selecting a gear to be engaged, the timing circuits being so coupled to the selector circuitry than in use a gear selected by operation of the manually operable switching means and associated through the selector circuitry with a respective one of the timing circuits is engaged only if the respective timing circuit is producing the respective gear enabling output, whereby overspeeding in the respective gear is prevented.
2. 2. Overspeed protection apparatus according to claim 1, wherein the manually operable switching means includes means for selecting a reverse gear to be engaged and the timing circuit having the longest predetermined time interval is so coupled to the selector circuitry as to control selection of both the lowest forward gear and the reverse gear.
3. 3. Overspeed protection apparatus according to claim 2, wherein the selector circuitry includes means for delaying engagement of a selected forward gear higher than the lowest forward gear until a predetermined delay time has elapsed from disengagement of the reverse gear.
4. 4. Overspeed protection apparatus according to any. preceding claim, wherein for each gear associated in use with a respective one of the timing circuits a thyristor is so included in the selector circuitry that a path for current through the thyristor is controlled by the manually operable switching means in accordance with whether or not the associated gear is selected for engagement, and the supplying of gating impulses to the thyristor is controlled in accordance with which output is produced by the respective timing circuit.
5. 5. Overspeed protection apparatus according to any preceding claim, wherein the speed sensing circuit includes a probe which is so influenced by disturbance of its magnetic environment as to provide a higher level of output signal when a body of ferromagnetic material is present in its effective field than when no such body is present.
6. 6. Overspeed protection apparatus according to Claim 5, wherein the said probe is, in use, mounted adjacent a flange arranged to rotate with the prop shaft of the vehicle, the flange carrying one or more studs of ferro-magnetic material, and the probe being so spaced from the flange that the or each

   stud will enter the effective field of the probe on each revolution of the flange, but the periphery of the flange itself will remain outside of the effective field of the probe, whereby the probe will generate a pulsed output, when the shaft is rotated, of a frequency determined by the speed of rotation of the flange.
7. 7. Overspeed protection apparatus substantially as hereinbefore described with reference to Figs. 1, 2, 3 and 4 of the accompanying drawings.