GB1597355A

GB1597355A - Display device

Info

Publication number: GB1597355A
Application number: GB26145/76A
Authority: GB
Original assignee: Pantridge J F
Current assignee: Pantridge J F
Priority date: 1976-07-23
Filing date: 1976-07-23
Publication date: 1981-09-09

Description

(54) DISPLAY DEVICE (71) We, JOHN ANDERSON of 16, Tor Grange, Carlston Avenue, Holywood, Co. Down, N.Ireland and JAMES FRAN CIS PANTRIDGE of Colin House, Dunmurry, Co. Antrim, N.Ireland, both British Subjects, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to an electroluminescent display system which is applicable especially but not exclusively to display of physiological information.

It is frequently desired to display a variable magnitude, which is measured in the form of an electric signal, on a display screen which shows a trace expressing the variation of the magnitude with time. For example, in hospitals electrocardiographs are used to observe the electrical behaviour of a patient's heart and the electrical impulses from the heart are displayed on a screen. Existing machines for this purpose normally use cathode ray tubes as a display device. However, machines using cathode ray tubes are quite bulky and unsuitable for use in portable equipment such as may be required in ambulances etc. in order to enable the condition of accident victims to be assessed on the spot.

The present invention is intended to provide a display system in which the magnitudes observed are interpolated along one axis whereas a time-base is provided along the other axis. Such interpolation enables a clear picture to be obtained showing the variation of a magnitude with time when the magnitude observed is varying rapidly.

According to one aspect of the invention, there is provided an electroluminescent display device comprising an electroluminescent panel provided on each side with an array of electrodes extending across the panel, the electrodes defining on the panel a matrix of dots at which electrodes on respective sides of the panel intersect and which are illuminated when a potential difference is applied between the respective electrodes, the dots being arranged along x and y - coordinate axes, a memory for storing digital signals, scanning means for scanning the memory a serial data control unit arranged to receive the signals from the scanning means and emit impulses in response to the signals received, at least one shift register arranged to receive the impulses from the data control unit, means for applying voltage to selected electrodes of one of the arrays in accordance with the impulses received by the shift register and means for applying voltages to successive electrodes of the other array to provide a time-base sweeping the matrix along the x -axis, the serial data control unit being such that the impulses provide a display which is interpolated along the y-axis.

The screen may be rectangular, with the shorter side providing a y (vertical) coordinate axis and the larger side a x (horizontal axis). The y-axis may be used to display the magnitude of the signal to be observed and the x-axis may provide a time-base. In one embodiment the horizontal electrodes are 128 in number and distributed from the bottom of the screen (level 1) to the top (level 128), giving a choice of 128 magnitude levels, and the vertical electrodes are 256 in number distributed across the screen to give the time-base. Using narrow electrodes which are closely spaced this screen may be of dimensions of approximately 11.5 cm x 6.6 cm to provide a small display device which is readily incorporated in portable equipment.

The electric signal to be displayed is fed to the screen in digital form and the circuitry for feeding digital signals to the electrodes may comprise shift registers having parallel outputs corresponding to the number of electrodes and connected to the outputs by latches and high-voltage drivers. These components may be made up from integrated circuits and thus may be sufficiently small to be attached to the back of the screen without greatly increasing its bulk. It has been found possible to provide a screen of 128 x 256 electrodes with associated shift registers, latches and high-voltage drivers having dimensions of only 11.5 cm x 6.6 cm x 0.8 cm.

When the screen is used to display a continuously varying signal, for example an electric signal from an electrocardiograph or electroencephalograph connected to a patient the signal may be amplified and passed to an analogue/digital converter which samples the signals at intervals and expresses the samples in digital form, for example as a 7-bit word to give 128 levels which may be displayed on a screen having 128 horizontal electrodes distributed along the y-axis. The samples may then be stored in a cyclic random-access memory which is scanned each time it is up-dated. The scanned samples are then successively fed into the shift registers connected to the y-axis electrodes on the screen and thence to the electrodes. Simultaneously a time-base signal, which is synchronised with the memory scan, is used to excite the vertical x-axis electrodes in turn. As a luminous dot appears on the screen at the intersection of two excited electrodes, a trace is displayed on the screen showing the magnitude and "shape" of the signal received from the patient.

It is preferred that the circuits for feeding the required signals to the electrodes be supplied in the form of discrete hybrid packages which are mounted at the edge of the glass substrate of the panel and are physically mounted on the glass. It has been found that this method of construction allows use of a high electrode density, and hence a high dot density, on the screen. This in turn allows use of a screen having small dimension, such as those mentioned above.

This construction allows provision of a very small and light display system which is well adapted for use in portable instruments, such as portable electrocardiographs which may be used in emergencies. The system may be incorporated in a portable defibrillator, for example of the type described in our British Patent 1,481,469, and connected to the defibrillator electrodes so that the behaviour of a patient's heart may be inspected before or after defibrillation.

For hospital use the display screen described above may be attached directly to the patient, for example to the patient's chest, to supply an immediately recognisable display of electric signals received from the patient.

When the signal fluctuates sharply, as may be the case for an electrocardiograph signal, it is desirable that the trace obtained should be vertically interpolated by displaying on the same vertical electrode all the levels between a sample and the preceding sample. This is achieved by inserting a suitable logic circuit for serial data control between the memory and the shift registers.

Such vertical interpolation gives a much clearer indication of the shape of the signal.

An embodiment of the invention will be described by way of exanmple with reference to the accompanying drawings, in which: Figure 1 is a schematic layout of a display system using an electroluminescent screen, Figure 2 shows a circuit diagram of a shift register shown in Figure 1, Figure 3 shows a vertically interpolated display obtained using the system of Figure 1, Figure 4 shows a display similar to Figure 3 but which is not interpolated, and Figure 5 shows a data processing unit forming part of the system of Figure 1.

Referring to Figure 1, the electroluminescent display panel 1 comprises a rectangular electroluminescent phosphor sheet, 10-50 microns thick, of a known electroluminescent material. The sheet, of dimensions 6.6 cm x 11.4 cm is sandwiched between glass sheets bearing electrodes which are photolithographically etched to the required configuration on glass substrates. On one side of the electroluminescent sheet the electrodes comprise thin strips 128 in number, uniformly distributed over the sheet and running across it parallel to the longer side of the sheet. On the other side-of the sheet there are provided similar strips, 256 in number, running parallel to the shorter sides. The electrodes thus define a rectangular matrix of 128 x 256 dots at their intersections, the dots being about 0.3 mm wide.

When a suitable potential difference is applied between selected electrodes on opposite faces of the sheet the latter is illuminated at the intersection of the electrodes.

On one side face of the panel assembly (the "back" of the panel with respect to the side from which it is to be viewed) there are mounted six hybrid packages 2a-2f containing integrated circuits from which electric signals are fed to the electrodes to illuminate selected points of the matrix.

Each of the hybrid packages comprises 64 outputs, from eight integrated circuits to the electrodes so that a total of six packages is required. They are arranged as shown in Figure 1, with the 128 horizontal electrodes connected alternately to packages 2a and 2b on each end of the screen, one being connected to the "odd" electrodes and the other to the "even" electrodes, and with the 256 vertical electrodes similarly connected alternately to packages 2c, 2d and to 2e, 2f.

Each of the hybrid packages consists essentially of a shift register to store the digital information fed into it, a 64-bit latch and corresponding high-voltage drivers to feed the information stored in the shift registers to the electrodes.

The shift register of each package is made up of eight integrated circuits 6 having identification numbers "74 LS 164", each having eight outputs, which store the serial information fed into the register and release the information through the 64-bit latch on completion of the shift sequence. This information is then fed to the electrodes through the high-voltage drivers and determines the illuminated dots displayed on the screen.

After operation of these latches the shiftregister is then shifted in response to a fresh set of information fed into it. The arrangement is such that the shift register may be shifted without affecting the output from the latch and the high voltage drivers: thus a fresh set of information may be fed into the registers while the previous set is still displayed on the screen. This feature is important in that it allows information to be fed to the screen at the rate required to allow effective display of physiological data such as the output signal from an electrocardiograph.

In a preferred embodiment the integrated circuits 6 themselves comprise the serial register stores, the latches and the highvoltage drivers in a single chip. This construction reduces the number of bonds required in the hybrids and thus reduces the cost.

The manner in which the integrated circuits of a hybrid are connected is shown in Figure 2. The "odd" and "even" hybrids are mounted on opposite sides of the screen.

The outputs from the integrated circuits to the screen are shown as 3 4 5 6 10 1112 13.

The serial information to be entered in the register is fed by line 7. Shifting of the register is effected by a clock signal fed from a clock device by line 8.

Referring again to Figure 1, an electric signal from electrodes attached to the patient is fed through leads 11 to an amplifier 10 which amplifies the signal to about 1 volt.

The amplified signal is then fed to an analogue/digital converter of the successive approximation type 12 which samples the signal at intervals and converts the samples into 7-bit binary words. These words provide 128 unique combinations or levels. The magnitude of each sample is thus expressed, in binary code, as a number from 1 to 128.

The words are then stored in a randomaccess memory 13 which has 256 locations, each storing 7 bits, which are scanned before the memory is up-dated by insertion of another word.

The words stored in the memory are then fed to a logic device 14 to carry out vertical interpolation. This devices takes the 7-bit words sequentially and loads them into temporary registers 15 and 16, such that when registers 15 contains the Mth sample register 16 contains the (M + 1)th sample.

These samples are then fed to a serial data control unit 17 which compares the M and the (M + 1) samples with a 7-bit counter which counts up to 128. When the count equals the lesser of the two samples a flip-flop is set and is re-set when the count equals the larger of the samples. The flipflop thus provides a serial output, starting at the lower of the samples and ending at the larger, which is fed to the packages 2a - 2f for display on the screen.

The nature of the vertically interpolated display obtained is shown in Figure 3. For comparison, Figure 4 shows the display obtained from the same signal when there is no vertical interpolation, i.e. the logic device 14 is omitted and the words from the memory are fed directly to the shift registers. It will be appreciated that vertical interpolation gives a much clearer display when the signal varies rapidly.

The output from the serial control unit is fed into the "vertical" shift registers, which are physically attached to the display screen, and passed to the electrodes when the latches receive a clock signal.

As explained above the vertical shift register is divided into two packages, mounted on opposite sides of the screen, connected to alternate electrodes so that one register stores and transmits voltages to the "odd" electrodes and the other transmits to the "even" electrodes.

The "horizontal" shift register, divided into four packages of the same construction as the "vertical" packages and connected to the 256 electrodes of the matrix, is used to provide a time-base for the display screen.

This is achieved by circulating a "1" signal in the horizontal shift registers so that the 256 electrodes are activated in turn. This "1" signal is moved from one electrode to the next by clock signals which are synchronised with the end of the "vertical" sequence whereby the "vertical" shift registers are filled.

The clock signals required for operating the analogue/digital converter, the random access memory, the temporary sample registers and serial data control unit, the shift registers and latches are all supplied by the single timing control unit 18.

The operation of the display system described may be summarized as follows. A continuous variable electric signal is received through leads 11 by amplifier 10, which amplifies it to the voltage required for the subsequent operations. This signal is sampled at intervals and converted to 7-bit words by the converter 12. The words are successively transferred to the memory 13 which is up-dated each time a fresh sample is taken. Between receipt of one word and the next, the memory is scanned throughout and a series of words representing the information stored in the memory at that instant is passed through the temporary registers, serial data control unit and vertical shift registers to the screen. Simultaneously, the "1" single is circulated through the horizontal registers so that the successive words from the memory are displayed as vertical lines of dots of the matrix on successive time-base electrodes.

The screen thus gives a display which represents the contents of the memory at that instant.

When a further 7-bit word representing a sample is received by the memory the memory is up-dated and the above process is repeated so that the screen then shows the up-dated information contained in the memory. A moving, vertically interpolated trace is thus obtained on the screen showing the magnitude and "shape" of the electric signal received through leads 11. It will be appreciated that if the signal is sampled at a relatively high rate, which is generally essential to give an accurate picture on the screen when the signal itself varies rapidly, the shift registers have to be refilled, and the information transferred from them to the screen, very rapidly. This rapid transfer is facilitated by the feature, described above, that the shift registers may be filled while the preceding 7-bit word is still being displayed.

The amplifier 10 may be a high-gain, high CMRR amplifier of conventional type. The converter 12 may be a conventional analogue/digital converter using a successive approximation register. Memory 13 may be a random access memory of known type using integrated circuit data storage.

The arrangement of the temporary registers 15 and 16 and serial data control unit 17 is shown schematically in Figure 5. The 7-bit words from the memory are fed first into register 16 (sample M + 1) and then into register 15 (sample M). The words are compared in comparator F to recognise the states M = (M + 1), M > (M + 1) and M < (M + 1). The magnitudes of the words are determined by comparators G and H which actuate the respective flip-flops FF when the appropriate clock pulse is reached.

Thus, as the counter proceeds from 1 to 128 clock pulses when M < (M + 1) the flip-flop of comparator H is set when the count of M is reached and a signal is emitted through gate Z to the shift registers on each clock pulse until the cunt of CM + 1) is reached, at which point the flip-flop of comparator G is reset and gate Z is closed. The counter then continues up to 128 and revert to 1 for the next count. When (M + 1) < M, the flip-flop of comparator G is set at (M + 1) and the flip-flop of comparator H is reset at M.

When M = (M + 1), the flip-flops are set to open gate Z for only one pulse. A signal is sent to the vertical shifts registers for each clock pulse at which either of the flip-flops are set. The screen display for each count thus represents the rise or fall of the signal M + 1 from the preceding signal M.

The temporary registers are of conventional construction, made up from 74LS175 integrated circuits, and the comparators are also conventional, made up from 74LS85 integrated circuits. The flip-flops are formed from 7474 units and the gate Z may be a 7420 unit. This assembly is, of course, built up of standard logic units and a considerable saving in bulk could be achieved by replacing them with integrated circuits specifically designed for this logical arrangement.

WHAT WE CLAIM IS: 1. An electroluminescent display device comprising an electroluminescent panel provided on each side with an array of electrodes extending across the panel, the electrodes defining on the panel a matrix of dots at which electrodes on respective sides of the panel intersect and which are illuminated when a potential difference is applied between the respective electrodes, the dots being arranged along x - and y -coordinate axes, a memory for storing digital signals, scanning means for scanning the memory, a serial data control unit arranged to receive the signals from the scanning means and emit impulses in response to the signals received, at least one shift register arranged to receive the impulses from the data control unit, means for applying voltages to selected electrodes of one of the arrays in accordance with the impulses received by the shift register and means for applying voltages to successive electrodes of the other array to provide a time-base sweeping the matrix along the x -axis, the serial data control unit being such that the impulses provide a display which is interpolated along the y -axis.

2. A device according to Claim 1, in which said shift register is connected to latches and high-voltage drivers connected to the electrodes to apply voltages thereto.

3. A device according to Claim 2, in which the shift register and latches are such that the impulses, stored in the shift register may be shifted without affecting the vol

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. continuous variable electric signal is received through leads 11 by amplifier 10, which amplifies it to the voltage required for the subsequent operations. This signal is sampled at intervals and converted to 7-bit words by the converter 12. The words are successively transferred to the memory 13 which is up-dated each time a fresh sample is taken. Between receipt of one word and the next, the memory is scanned throughout and a series of words representing the information stored in the memory at that instant is passed through the temporary registers, serial data control unit and vertical shift registers to the screen. Simultaneously, the "1" single is circulated through the horizontal registers so that the successive words from the memory are displayed as vertical lines of dots of the matrix on successive time-base electrodes. The screen thus gives a display which represents the contents of the memory at that instant. When a further 7-bit word representing a sample is received by the memory the memory is up-dated and the above process is repeated so that the screen then shows the up-dated information contained in the memory. A moving, vertically interpolated trace is thus obtained on the screen showing the magnitude and "shape" of the electric signal received through leads 11. It will be appreciated that if the signal is sampled at a relatively high rate, which is generally essential to give an accurate picture on the screen when the signal itself varies rapidly, the shift registers have to be refilled, and the information transferred from them to the screen, very rapidly. This rapid transfer is facilitated by the feature, described above, that the shift registers may be filled while the preceding 7-bit word is still being displayed. The amplifier 10 may be a high-gain, high CMRR amplifier of conventional type. The converter 12 may be a conventional analogue/digital converter using a successive approximation register. Memory 13 may be a random access memory of known type using integrated circuit data storage. The arrangement of the temporary registers 15 and 16 and serial data control unit 17 is shown schematically in Figure 5. The 7-bit words from the memory are fed first into register 16 (sample M + 1) and then into register 15 (sample M). The words are compared in comparator F to recognise the states M = (M + 1), M > (M + 1) and M < (M + 1). The magnitudes of the words are determined by comparators G and H which actuate the respective flip-flops FF when the appropriate clock pulse is reached. Thus, as the counter proceeds from 1 to 128 clock pulses when M < (M + 1) the flip-flop of comparator H is set when the count of M is reached and a signal is emitted through gate Z to the shift registers on each clock pulse until the cunt of CM + 1) is reached, at which point the flip-flop of comparator G is reset and gate Z is closed. The counter then continues up to 128 and revert to 1 for the next count. When (M + 1) < M, the flip-flop of comparator G is set at (M + 1) and the flip-flop of comparator H is reset at M. When M = (M + 1), the flip-flops are set to open gate Z for only one pulse. A signal is sent to the vertical shifts registers for each clock pulse at which either of the flip-flops are set. The screen display for each count thus represents the rise or fall of the signal M + 1 from the preceding signal M. The temporary registers are of conventional construction, made up from 74LS175 integrated circuits, and the comparators are also conventional, made up from 74LS85 integrated circuits. The flip-flops are formed from 7474 units and the gate Z may be a 7420 unit. This assembly is, of course, built up of standard logic units and a considerable saving in bulk could be achieved by replacing them with integrated circuits specifically designed for this logical arrangement. WHAT WE CLAIM IS:

1. An electroluminescent display device comprising an electroluminescent panel provided on each side with an array of electrodes extending across the panel, the electrodes defining on the panel a matrix of dots at which electrodes on respective sides of the panel intersect and which are illuminated when a potential difference is applied between the respective electrodes, the dots being arranged along x - and y -coordinate axes, a memory for storing digital signals, scanning means for scanning the memory, a serial data control unit arranged to receive the signals from the scanning means and emit impulses in response to the signals received, at least one shift register arranged to receive the impulses from the data control unit, means for applying voltages to selected electrodes of one of the arrays in accordance with the impulses received by the shift register and means for applying voltages to successive electrodes of the other array to provide a time-base sweeping the matrix along the x -axis, the serial data control unit being such that the impulses provide a display which is interpolated along the y -axis.

tages applied by the latches and drivers so that a fresh set of impulses may be fed into the register while the previous set is being displayed on the screen.

4. A device according to Claim 1, 2 or 3, in which the serial data control unit comprises two temporary registers arranged to contain respective signals, the comparator means arranged to compare the signals and measure their magnitudes and a flip-flop device arranged to allow emission of impulses to provide an interpolated display derived from the respective signals.

5. A device according to any preceding Claim, comprising a pair of electrodes for receiving an analogue signal, an amplifier connected to the electrodes to amplify the analogue signal and an analogue-to-digital converter to convert the analogue signal to a digital signal, the converter being connected to the memory to feed the digital signals thereto.

6. A device according to Claim 5, in which said pair of electrodes is adapted to be connected to the body of a patient to receive electrical signals therefrom.

7. An electroluminescent display device, substantially as hereinbefore described with reference to the accompanying draw ings.