GB1593296A - Heterodyne tuning circuits - Google Patents

Description

(54) IMPROVEMENTS IN OR RELATING TO HETERODYNE TUNING CIRCUITS (71) We, LICENTIA PATENT-VERWALTUNGS-GESELLSCHAFT MIT BESCHRANKTER HAFTUNG, a company organised under the laws of Germany, of Theodor-Stern-Kai 1, 6 Frankfurt/Main 70, Germany, do hereby declare the invention for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: The present invention relates to a circuit arrangement suitable for use in an automatic heterodyne tuning circuit in which there are tuning means, the tuning frequency of which is variable in response to a tuning signal applied to the tuning means arranged to transpose a received radio frequency signal into an I.F. signal and an intermediate frequency (I.F.) circuit having a preset I.F. pass range.

As is known, there are heterodyne receivers having voltage-controlled tuning, in which the received frequency is transposed into an intermediate frequency in a mixing circuit. The frequency tuning of the receiver can be effected by capacity diodes, which are controlled by the direct tuning voltage and vary the frequency of a mixing oscillator in a desired manner.

For simplifying the tuning, in heterodyne receivers there are often used circuit arrangements for an automatic search sweep, which generate a varying voltage until a transmitter suitable for reception is tuned in. Such circuit arrangements are known for both radio and television receivers. Thus there is described in the periodical "Funkschau" 1971, volume 17, pages 535 et seq. a circuit arrangement for the digital search sweep of a VHF receiver. Furthermore, in the publications "Funkschau" 1973, volume 13, pages 469 et seq.

and "Funk-Technik" 1974, no. 3, pages 81 et seq. a search sweep circuit for a television receiver is proposed. This search sweep circuit includes a search button upon actuation of which the circuit sweeps successively through all the television bands or ranges for which the receiver is designed and stops when a television transmitter is received. Upon renewed actuation of the search sweep button the transmitter search sweep runs on as far as the next television transmitter received, and at the end of the last band or range jumps back to the start of the first band or range and there automatically begins the search sweep anew. The search sweep is always stopped by a control circuit whenever the discriminator adjusted to the picture carrier intermediate frequency (required intermediate frequency) gives a signal which is imparted to the control circuit by a supervisory circuit.

According to the present invention, there is provided a circuit arrangement suitable for use in an automatic heterodyne tuning circuit in which there are tuning means, the tuning frequency of which is variable in response to a tuning signal applied to the tuning means arranged to transpose a received radio frequency signal into an I.F. signal and an intermediate frequency (I.F.) circuit having a preset I.F. pass range, the circuit arrangement comprising: a supervisory circuit having an input for receiving the I.F. signal from the I.F. circuit and an output arrangement for outputting different supervisory signals which the supervisory circuit selectively generates in dependence on whether the I.F. signal frequency is within or outside the said I.F. pass range and on which of a plurality of different frequency ranges within the said I.F. pass range the I.F. signal frequency falls; and a tuning signal control means having an input arrangement connected to receive the supervisory signals, the control means being operable to vary the tuning signal in dependence on the supervisory signals to cause the frequency of the I.F. signal to fall within a predetermined one of said ranges and to maintain it within that range.

In the case of picture and sound transmitters, variation of the tuning signal can stop in response to interference. Therefore in an embodiment a transmitter recognition circuit determines whether a picture or sound transmitter or interference is involved. If the search sweep has not been stopped because of a picture transmitter the search sweep is automatically continued.

The supervisory circuit requires a relatively high expenditure on components, in particular in embodiments in which a comparison of the carrier frequency generated by the transmitter and transported to the intermediate frequency with the required intermediate frequency takes place, and in which means may also be provided for transmitter recognition. There is therefore the desire to manufacture the supervisory circuit in integrated technique. Owing to the high frequencies to be dealt with (in the case of television receivers e.g. between 33.4 and 38.9 MHz) present opinion is that only bipolar IC techniques are suitable for this purpose.

In addition to the search sweep being influenced by the control circuit, storage of the value of the direct tuning voltage related to the respective transmitter is also desirable. For this purpose semi-conducting stores are particularly suitable. The control, which with suitable integration is also to include the store, can therefore be manufactured in advantageous manner only in MOS-IC technique owing to the high expenditure required in the case of digital storage. Since the number of connections (pins) in an IC essentially determines its cost, in the case of integration of both the supervisory circuit and the control circuit controlled by it, it is important to be able to effect the correspondence between the two IC's over as few leads as possible.

Accordingly in a preferred form of the invention the output arrangement of the supervisory circuit comprises a single output common to all the supervisory signals and the input arrangement of the control means comprises a single input common to all the supervisory signals.

Definite selected frequency positions of the carrier transposed into the IF pass range are, by means of a supervisory circuit, associated with a quite definite supervisory signal. In this way it is possible to transmit, via a single lead from the supervisory circuit to the control circuit, the information required for the control circuit to influence the search sweep. Via its one input the control circuit receives both orders for the complete search for transmitters suitable for reception and orders for the compensation of deviations in the sense of an AFC.

All orders required for this are derived from the said frequency signals associated with definite positions of the transposed carrier. Since only one pin at a time is necessary for the transmission of information, a valuable integration of the supervisory circuit and the control circuit is made possible.

In the following, the invention will be explained in more detail with reference, by way of example to the drawings: Figure 1 shows the block diagram of a practical form of the invention in a television receiver, Figure 2 shows the required IF pass curve of a television receiver in which the invention is used, as well as the direction of tuning for picture and sound carriers, Figure 3 shows the diagram of a voltage in relation to the frequency, which voltage results from the comparison of the carrier transposed into the IF pass range with the required intermediate frequency and from which voltage are derived signals which are related to quite definite positions of the transposed carrier, Figure 4 shows an encoding circuit which serves for the generation of the signals associated with the definite positions of the transposed carrier from the voltage shown in Figure 3.

Figure 5 shows a diagram of the signals generated by an encoding circuit in accordance with Figure 4 during tuning in relation to time, Figure 6 shows the block circuit diagram of a supervisory circuit for the comparison of the transposed frequency of the received carrier with the intermediate frequency and its evaluation, Figures 7 and 8 show a detailed circuit diagram of the circuit in accordance with Figure 6, and Figure 9 shows the circuit diagram of a control circuit controlled by the supervisory circuit of Figure 6, including the generation and required influencing of the search sweep voltage.

In the block circuit diagram illustrated in Figure 1 a signal modulated with picture and sound passes via a receiving antenna 1 of a television apparatus to a tuner 2 which can be tuned by means of capacity diodes 3. Here an intermediate frequency is generated in accordance with the heterodyne principle. An intermediate frequency amplifier 4 is connected to the tuner 2, from which intermediate frequency amplifier 4 the signals pass via a video demodulator 5 and a video amplifier 6 to a picture tube 7. Between the video demodulator 5 and the video amplifier 6 there takes place, in known manner in a separating stage, the separation of the synchronising pulses for frames and lines, the further treatment of which for the line and frame deflection in the television is not illustrated in the block circuit diagram of Figure 1.

The intermediate frequency amplifier 4 is connected to a supervisory circuit 8 which determines the amount of deviation of the actual intermediate frequency from a predetermined required frequency. The actual frequency of the received signal generated by the transmitter and transported on the heterodyne principle to the actual intermediate frequency is in this way compared with the required intermediate frequency. Since this comparison is sought only when a signal is actually being received and there is no interference, the supervisory circuit is connected to the video demodulator 5 for the purpose of signal recognition. In this way it is arranged that the search sweep is stopped only when there is no interference but a signal is actually being received.Such signal recognition circuits are known in themselves and are for example described in more detail in German Auslegeschrift 15 91 753 or German Auslegeschrift 24 26 388.

In Figure 1 there is further provided a circuit part 10, which includes inter alia a control circuit 11, a store 12, a start button and a circuit 13 for the generation of the tuning voltage.

Via a lead 15 the tuning voltage UD is fed to the tuner 2 for the required tuning. The search sweep is set in operation by actuation of the start button 14, whereby a varying voltage for sweep tuning of the television receiver is generated. By reason of the frequency comparison performed by the supervisory circuit 8 information is fed to the control circuit 11 via a single lead 9. The control circuit 11 deals with this information and influences the search sweep in such manner that tuning is automatically effected to a transmitter suitable for reception and the transmitter is held by an automatic frequency control (AFC). This is explained in more detail below. The store 12, stores the values of the direct voltages associated with particular transmitters in the form of binary encoded words.

Since controlling of the control circuit 11 by the supervisory circuit 8 via only one lead is possible, in the case of integration of both the supervisory circuit and the control circuit 11 including the store 12 only one pin is necessary for correspondence between the IC's.

Owing to the relatively high frequencies to be dealt with the supervisory circuit 8 is advantageously manufactured in monolithic integrated technique such as bipolar IC. With integration of the control circuit 11 and the store 12 the MOS-IC technique can be employed in an advantageous manner, since there is an digital/analog converter in the control circuit 11 as well as the digital store 12 for both of which a high resolution - e.g.

13-bit - is required in order to generate and store as exactly as possible the values of direct tuning voltages associated with particular transmitters.

For better understanding of the operation of the invention, there is first illustrated in Figure 2 the required pass curve 16 of the intermediate frequency amplifier 4. The proper I.F. position of the transposed picture carrier frequency 18 is for example located at 38.9 MHz and that the transposed sound carrier frequency 17 at 33.4 NHz. Below the frequency scale in Figure 2 is marked the tuning direction when a search sweep is so started that tuning takes place from low frequencies to higher frequencies in a steady manner. As can be seen, the sound carrier frequency 17 and the picture carrier frequency 18 are in known manner located at 5.5 MHz from one another. An actual transmitter frequency transposed to the intermediate frequency is, in the case of the said direction of the search sweep, at first lower than the proper IF frequency.In the illustration the transposed picture carrier frequency 18 is at about 33 MHz at the beginning of the search sweep and the transposed sound carrier frequency 17 is 5.5 MHz below this.

There will now be explained, with reference to Figures 3 to 5, which signals result at the output 9 of the supervisory circuit 8 for controlling the control circuit 11 during the search sweep. In Figure 3 is indicated a voltage UA generated within the supervisory circuit 8 in accordance with a frequency difference f resulting from the comparison of the proper intermediate frequency with the actual transposed frequency of the received carrier (i.e.

actual intermediate frequency). Different frequency positions of the transposed carrier are therefore at first associated with different values of the voltage UA. By means of an encoding circuit 26 (shown in Figure 4) definite voltage ranges of UA and thus of frequency fare associated with respective definite voltage UO, UM and Ug, which occur at the output 25 of the encoding circuit 26 and are applied to the control circuit 11 in Figure 1.

The said association is represented in Figure 3 by the voltage ranges UO, UM and Un. On the curve 19 for the voltage UA are entered four points (threshold values) S, S1, S2 and S3.

If during the search sweep the transposed frequency of the picture carrier of a television transmitter is still located outside the IF pass range, the voltage UA has the value UAl and hence lies within the voltage range which generates the discrete voltage UM at the output 25 of the encoding circuit 26. If the transposed picture carrier frequency falls at about 34 MHz (which corresponds to a point just to the right of S3 in Figure 3) in the pass range, the voltage UA falls and is now located in such a voltage range that the encoding circuit 26 generates the discrete voltage UO at the output 25. During further tuning the transposed picture carrier frequency comes over nearer to the required intermediate frequency of 38.9 MHz and the voltage UA rises again.At the point S1 the transposed actual picture carrier frequency is at about 75 KHz to 100 KHz below the proper position of 38.9 MHz. When this point is passed, the voltage at the output 25 of the encoding circuit 26 jumps to the value UM. If the picture carrier wanders further above the required value and passes the point S2, which corresponds to a position of 75 KHz to 100 KHz above the required frequency of 38.9 MHz, the voltage at the output 25 jumps to a third value Un. If the transposed actual picture carrier frequency now wanders still further in the direction of higher frequencies so that it passes outside the IF pass range, the voltage at the output 25 jumps again to the value UM.During the tuning by means of the search sweep there occurs at the output 25 at any time one of the three voltages UO, UM or UB.

In Figure 5 these voltages are entered in relation to the time t. For the purpose of explanation it will be assumed that at time to there are two television transmitters suitable for reception. It is desired to tune to the transmitter of higher carrier frequency. Initially, let it be assured the television receiver is tuned to the transmitter of lower frequency, but that transmitter is not transmitting. The voltage UA at time to is then between the points S1 and S2, so that UM is at the output 25. Let it be assumed that at time tithe start button 14 is actuated, whereby the search sweep "Fast forward" in initiated and the lower frequency transmitter also then transmits.The actual transposed picture carrier frequency of the lower frequency television transmitter overruns the threshold S2 (75 to 100 KHz above the proper intermediate frequency of 38.9 MHz of the desires transmitter) at time t9 and the voltage at the output 25 changes from UM to Un. At the time t3 the voltage changes again from UB to UM, since the transposed picture carrier frequency, owing to the search sweep, has now run out of the IF pass curve and no further signal is supplied by the transmitter recognition circuit.At time t4 the fast sweep has tuned the receiver in the vicinity of the desired transmitter (e.g. to -3 to -4MHz before the proper transposed carrier frequency of the desired transmitter), so that at the place S3 the voltage jumps from UM to UO. Owing to the further search sweep tuning the actual transposed carrier frequency of the desired transmitter overruns the threshold Si (-75 to -100 KHz before the proper transposed carrier frequency of the desired transmitter) and the voltage jumps at time t5 from UO to Urn. At time t6 the transposed carrier frequency overruns the threshold S2 (75 to 100 KHz above the proper transposed carrier frequency of the desired transmitter) so that the voltage changes from UM to Un. By this flank from UM to Un drawn in heavy lines in Figure 5 the control circuit 11 switches the search sweep from "Fast forward" to an oppositely directed search sweep "Reverse". At the same time the speed of tuning is also reduced, so that the search sweep "Reverse" takes place only about half as fast as the previous search sweep "Fast forward".

Owing to the unavoidable time constants the varying direct tuning voltage UD for the tuner 2 does not immediately follow the reversal of direction of the search sweep. The direct tuning voltage UD, which for example is generated by means of a digital/analog converter and subsequent integration, therefore effects a further overrunning of the point S2. In spite of the reversal of direction of the search sweep effected at time t6 the actual transposed carrier frequency will first leave the IF pass range, so that at time t7 the voltage at the output 25 of the encoding circuit 26 jumps from Un to UM. In this way the reversal of the direction of search sweep is displaced somewhat relative to the time t6 by the integration time constants as regards the direct tuning voltage UD.Owing to the now effective tuning in the reverse direction the actual transposed picture carrier frequency (of the desired transmitter) again passes into the IF pass range, so that at time tg the voltage jumps from UM to UB and owing to the further tuning in the reverse direction the voltage at time t(, jumps from Un to UM when the transposed frequency goes below the threshold S2. During the further tuning in the reverse direction the actual transposed carrier frequency (of the desired transmitter) overruns the required frequency of 38.9 MHz at the point S and also the threshold S1 at -75 to -100 KHz below the proper IF of the desired transmitter.

Therefore at the instant t() the voltage jumps from UM to UO By this flank, drawn heavily in Figure 5, the control circuit 11 switches the search sweep from "Reverse" to "Slow forward". In addition to the reversal of direction therefore the speed of tuning is also reduced, for example by the factor 10. Owing to the slow search sweep the actual transposed carrier frequency again overruns the point S1 (-75 to -100 KHz before the proper transposed frequency), so that at instant tithe voltage jumps from UO to UM. The search sweep is stopped by this heavily drawn flank. The receiver is now tuned to the desired transmitter.

The description of Figure 5 makes it clear that one function of the control circuit 11 is to deal with the pulse sequence fed to it via only one lead 9 in such manner that at the heavily drawn switching flanks the described reversals of the search sweep take place. A possible circuit, by which the three discrete voltages UO, UM and Un described can be generated, is shown in Figure 4. The encoding circuit 26 includes inter alia a transistor 22, with a working resistor 24, which is connected to a positive supply voltage +U4. The transistor 22 can be conducting with two current conditions or closed, which is effected by suitable control at the terminals 20 and 21.Thus the voltage at the output 25 can assume the three values UO, UM or Un, the voltage UO being about 0 volts, the voltage UM corresponding to about half the operating voltage +U4 and the voltage Un being about equal to the operating voltage +U4.

The control circuit 11 (Figure 1) is so designed that upon actuation of the start button 14 the "Fast forward search sweep" is initiated. Subsequent jumps of voltage from UM to UB or Un to UM do not influence the fast forward sweep. A command UM to UO prepares the control circuit 11, such that upon the next following command UM to Un there is a change over from fast forward sweep to reverse sweep. The reverse sweep is changed over to "Slow forward" only upon a subsequent command UM to UO, and the command UO to UM stops the search sweep.With this arrangement the effect is that a picture carrier with faulty synchronisation does not lead to an unwanted stopping of the sweep, since with interference present the point S2 (75 - 100 KHz after the required position) is not run through withput distortion, so that the commannd UM to Un is suppressed and the "Fast forward" tuning continues.

A transmitter in mirror position is also overrun, since such a transmitter, instead of the command at instant t4 initiates a command UM to Un and upon further sweeping only commands UM to UO occur, which do not lead to stopping of the search sweep, since the subsequent command UM to UB necessary for reversal of the direction of the search sweep is absent.

In addition to the functions so far described the control circuit has also the task, after tuning has been effected - therefore after stopping of the search sweep - of holding the received carrier in the required position or in its vicinity, so that any drifting in the apparatus is corrected (Correction sweep). Therefore the control circuit 11, upon deviations beyond the two thresholds S1 or S2, effects a regulation in the sense of automatic frequency control.For this purpose - after tuning to a transmitter has been effected by means of the search sweep and the search sweep has been stopped - the voltages UO, UM and UB have the following functions for the correction sweep: UM = Stop UO = Slow forward Un = Slow reverse Therefore, so long as the carrier is located between the two points S1 and S2, the voltage at the output 25 is UM. If owing to drifts the carrier wanders beyond the point Slltowards lower frequencies the voltage jumps from UM to UO and the correction sweep "Slow forward" is started, until the threshold S1 is again overrun in the direction of higher frequencies, whereby the voltage again jumps to UM and the correction sweep stops.If on the other hand the carrier wanders beyond the point S2 towards higher frequencies the voltage jumps from UM to Ug, whereby the correction sweep "Slow reverse" is started and the carrier is again tuned in the direction of the required position. The threshold S2 is again exceeded in the direction of lower frequencies. The voltage jumps from Un to UM and the correction sweep is stopped. In the manner described, therefore, automatic frequency control takes place. The last-described association of the three voltages with definite correction sweep functions is however ended as soon as the start button 14 is actuated. Then the relationship described with reference to Figure 5 applies until tuning to the next transmitter suitable for receiption has been effected and the search sweep has been stopped.

In Figure 6 is illustrated a circuit diagram of the supervisory circuit 8. The IF signal of the IF amplifier 4 (Figure 1) is fed to a wide band amplifier 27, which controls a following quadrature detector 28. In the quadrature detector 28, which is known in itself, the frequency of the IF signal is compared with the required intermediate frequency of 38.9 MHz. As reference magnitude there serves a phase reference circuit 31, which is tuned to the required frequency of 38.9 MHz. The phase reference circuit can be tuned by a direct voltage UN through for example +300 KHz to - 600 KHz, in order to cancel out errors in the transmission characteristic of the television signal path. The quadrature detector 28 produces a symmetrical current deviation signal representing the amount of deviation which is fed to the following double symmetrical current amplifier 29.As can be seen in more detail in the detailed circuit diagram in Figure 7, the amplification of the current amplifier 29 is switched by a keying pulse. The duration of the keying pulse corresponds approximately to the width of the line synchronising pulse. Keying of the deviation signal UA is necessary for two reasons: (a) One is that influence of the picture content (phase error) and the influence of interference is to be avoided.

(b) The other is that the deviation signal is to be activated only when recognition of a useful signal has taken place, i.e. when a transmitter is actually being received.

Therefore in Figure 6 there is provided a transmitter recognition circuit 32 controlled via an input terminal 37, which circuit controls an AND circuit 33 via the lead 38 together with the lead 39 (line flyback pulse). The transmitter recognition circuit 32 may be constructed in a manner known in itself. It has to ensure that stopping of the search sweep is effected only when a transmitter is actually received and no interference is present. Therefore in Figure 6 the current amplifier 29 is influenced by the AND circuit 33. Furthermore, an evaluation circuit 30 is influenced via an integrator 34. This evaluation circuit 30 is also fed with the voltage UA already mentioned in Figure 3, which appears at the output of the current amplifier 29 at the junction of two resistors 35 and 36.To the evaluation circuit 30 is connected the encoding circuit 26 already mentioned with reference to Figure 4, the output voltage of which at the output 25 assumes the values UO, UM and Un. The evaluation circuit evaluates the magnitude of voltage UA and provides corresponding control signals to the encoding circuit 26.

In the detailed circuit diagram of Figures 7 and 8 of the supervisory circuit 8 the references employed in Figure 6 are retained for better understanding, the individual circuit parts being shown by broken lines. Figures 7 and 8 form a complete circuit diagram, the terminals provided with similar references being regarded as connected to one another. The supervisory circuit 8 is - with the exception of the phase reference circuit 31 - constructed in advantageous manner as a bipolar IC. In this case the terminals 25, 40, 41, 42, 43, 38, 39, 31a and 31b and 47 form the external connections of the IC. In Figure 7 the AND circuit 33 has fed to it, via the terminal 38, a recognition signal and the terminal 39 has the negative flyback pulse fed to it.Thereby, in the AND circuit 33 a keying pulse of line synchronising pulse width is generated in accordance with the useful signal recognition (transmitter recognition), in such form that for example a positive keying pulse is present on the lead 45, whereby the current amplifier 29 is freed.

The evaluation circuit 30 in Figure 8 includes two threshold value switches which consist of a Schmitt trigger arrangement of definite hysteresis. The Schmitt trigger arrangement is for example switched on at the point S1 of the characteristic and is switched off near the point S. Thereby there occur at the terminals 20 and 21 the desired signals for controlling the encoding circuit 26. The encoding circuit 26 therefore changes the positive deviation pulse into the defined pulse system for controlling the control circuit 11.

The integration amplifier 34 prolongs the keying pulse over the line synchronising pulse time (keying pulse width for example 8 llsec) and with this pulse switches the threshold value switch of the evaluation circuit 30. Owing to the hysteresis of the threshold value switches switching off would not occur and hence a jump back to UM at the output would not be possible, if for example the useful signal recognition were switched off and the threshold value previously stood at "one". At the output 25 there finally occurs the pulse sequence of the voltages UO, UM, Un already mentioned.

In Figure 9 is illustrated a block diagram showing the principle of the circuit part 10 already illustrated in broken lines in Figure 1. By the broken lines it is meant that the control circuit 11, the store 12 and the intergratable parts of the circuit for generating the tuning voltage, inclusive of a digital/analog converter, are integrated as an MOS-IC.

The output signals of the supervisory circuit 8 pass via the led 9 and the terminal 25 to two Schmitt triggers 48 and 49. The Schmitt trigger 48 is for example set upon passage of the voltage from UO to UM and the Schmitt trigger 49 is set upon passage of the voltage from UM to Un. A decoder 50 connected to follow the two Schmitt triggers 48 and 49 generates, from the signals fed to it, three output signals corresponding to the levels UO, UM Un for controlling a sequential control circuit 51. The sequential control circuit 51 is constructed from counters, flip-flops AND, OR, NAND and NOR gates. Via leads 52, 53, 54 further information is fed to the sequential control circuit 51 as marginal conditions. Via the lead 52 the start of the search sweep is imparted. The lead 53 feeds the information that a counter 63 provided for the generation of the variable voltage is full and the lead 54 feeds the information that the said counter is empty.

The sequential control circuit is connected via leads 55 to an order decoder and a link logic 56, which is controlled by a beat generator 57 (oscillator) via three leads 58, 59 and 60.

The frequency of the beat generator determines the speed of the search sweep. The relatively high frequencies are applied via the lead 58, whereby the search sweep takes place rapidly. Lower frequencies that effect a search sweep at a medium speed, are applied via the lead 59. Finally, on the lead 60 there occur relatively low frequencies which effect a slow search sweep.

The generation of the variable tuning voltage UD necessary for the search sweep can be effected by a 13-bit binary forward and reverse counter 63 with a following 13-bit digital/analog converter 64 counting the pulses of the beat generator 57. The 13-bit digital/analog converter is for example constructed as a so-called RATE MULTIPLIER, for which purpose for example three IC's of type SN 7497 (Texan Instruments) are suitable.

In the case of high frequency of the pulses and during forward counting the tuning voltage rises rapidly. In reverse counting, in contrast, the tuning voltage falls, the speed depending on the frequency of the counted pulses. The various types of search sweep described with reference to Figure 4 are therefore obtained by suitable control of the counter 63.

The counter 63 has a beat input T, a forward counting input V and a reverse counting input R, which are controlled in the desired manner by the order decoder and the link logic 56. The three different sequences of counting pulse, which correspond to fast, medium and slow speed, are fed via an OR gate 61. The manner in which the control of the counter 63 has to take place, which depends on the pulse sequence shown in Figure 4, is imparted to the error decoder and the link logic 56 by the sequential control circuit 51, which in suitable manner evaluates the pulse sequence at the output of the supervisory circuit 8. The counter 63 may for example be formed by four counters of type SN 74191 (Texas Instruments).

In the case of tuning by means of capacity diodes a quite definite tuning voltage is associated with each transmitter. Since in Figure 9 the tuning voltage can be represented by the state of the counter 63, the possibility exists of storing the tuning voltage and hence the transmitter. For this purpose a store 62 is provided, which when required stores that counting state of the counter 63 which is associated with a desired tuning voltage. For the practical form of the store 62 there may come into question for example the known integrated circuits SN 7489 (Texas Instruments).

A circuit arrangement constructed in accordance with the practical example described for the tuning of television receivers operates with a resolution of the tuning voltage into steps of four mV - hence for a tuning voltage range of 0 volts to 33 volts with about 8,200 step of 4 mV - with a fast forward sweep speed of 1,000 steps per second. The reverse speed is for example 500 steps per second, and the slow forward or slow reverse speed 25 steps per second. In this way for example the whole UHF range (about 400 MHz can be search in about 8 seconds for transmitters suitable for reception and these can be stopped in the required position.

In addition to circuit arrangements known in themselves for the generation of the tuning voltage UD with a digital/analog converter, a circuit arrangement described in more detail in our patent application 24518/76 (Serial No. 1553697) may be employed. In this case pulses are fed via a programmable frequency divider and a switch 65 to a lowpass 66 consisting of RC members. The tuning voltage UD occurring at the output is dependent on the number of pulses per unit of time, hence on the frequency thereof. By changes in the division ratio of the said programmable frequency divider a variable tuning voltage UD can be generated. For this purpose a varying binary number may be applied to the programmable divider, the binary number being derived from the counter 63.

The invention has indeed been described with reference to a practical example in the case of a television apparatus, but it is evident that the invention may be employed in a heterodyne sound radio receiver. In this case also, during the tuning operation there is the pulse sequence shown in Figure 4, which is dealt with by the control circuit 11 and influences the search sweep in the manner described.

WHAT WE CLAIM IS: 1. A circuit arrangement suitable for use in an automatic heterodyne tuning circuit in which there are tuning means, the tuning frequency of which is variable in response to a tuning signal applied to the tuning means arranged to transpose a received radio frequency signal into an I.F. signal and an intermediate frequency (I.F.) circuit having a preset I.F.

pass range, the circuit arrangement comprising: a supervisory circuit having an input for receiving the I.F. signal from the I.F. circuit and an output arrangement for outputting different supervisory signals which the supervisory circuit selectively generates in dependence on whether the I.F. signal frequency is within or outside the said I.F. pass range and on which of a plurality of different frequency ranges within the said I.F. pass range the I.F. signal frequency falls; and a tuning signal control means having an input arrangement connected to receive the supervisory signals, the control means being operable to vary the tuning signal in dependence on the supervisory signals to cause the frequency of the I.F. signal to fall within a predetermined one of said ranges and to maintain it within that range.

2. An arrangement according to Claim 1, wherein the supervisory circuit has a further input for receiving a transmitter recognition signal indicating that the received radio frequency signal originates from a transmitter rather than interference, the supervisory circuit being arranged to operate in dependence on the recognition signal.

3. An arrangement according to Claim 1 or 2, wherein the supervisory circuit comprises

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (31)

**WARNING** start of CLMS field may overlap end of DESC **. effected by a 13-bit binary forward and reverse counter 63 with a following 13-bit digital/analog converter 64 counting the pulses of the beat generator 57. The 13-bit digital/analog converter is for example constructed as a so-called RATE MULTIPLIER, for which purpose for example three IC's of type SN 7497 (Texan Instruments) are suitable. In the case of high frequency of the pulses and during forward counting the tuning voltage rises rapidly. In reverse counting, in contrast, the tuning voltage falls, the speed depending on the frequency of the counted pulses. The various types of search sweep described with reference to Figure 4 are therefore obtained by suitable control of the counter 63. The counter 63 has a beat input T, a forward counting input V and a reverse counting input R, which are controlled in the desired manner by the order decoder and the link logic 56. The three different sequences of counting pulse, which correspond to fast, medium and slow speed, are fed via an OR gate 61. The manner in which the control of the counter 63 has to take place, which depends on the pulse sequence shown in Figure 4, is imparted to the error decoder and the link logic 56 by the sequential control circuit 51, which in suitable manner evaluates the pulse sequence at the output of the supervisory circuit 8. The counter 63 may for example be formed by four counters of type SN 74191 (Texas Instruments). In the case of tuning by means of capacity diodes a quite definite tuning voltage is associated with each transmitter. Since in Figure 9 the tuning voltage can be represented by the state of the counter 63, the possibility exists of storing the tuning voltage and hence the transmitter. For this purpose a store 62 is provided, which when required stores that counting state of the counter 63 which is associated with a desired tuning voltage. For the practical form of the store 62 there may come into question for example the known integrated circuits SN 7489 (Texas Instruments). A circuit arrangement constructed in accordance with the practical example described for the tuning of television receivers operates with a resolution of the tuning voltage into steps of four mV - hence for a tuning voltage range of 0 volts to 33 volts with about 8,200 step of 4 mV - with a fast forward sweep speed of 1,000 steps per second. The reverse speed is for example 500 steps per second, and the slow forward or slow reverse speed 25 steps per second. In this way for example the whole UHF range (about 400 MHz can be search in about 8 seconds for transmitters suitable for reception and these can be stopped in the required position. In addition to circuit arrangements known in themselves for the generation of the tuning voltage UD with a digital/analog converter, a circuit arrangement described in more detail in our patent application 24518/76 (Serial No. 1553697) may be employed. In this case pulses are fed via a programmable frequency divider and a switch 65 to a lowpass 66 consisting of RC members. The tuning voltage UD occurring at the output is dependent on the number of pulses per unit of time, hence on the frequency thereof. By changes in the division ratio of the said programmable frequency divider a variable tuning voltage UD can be generated. For this purpose a varying binary number may be applied to the programmable divider, the binary number being derived from the counter 63. The invention has indeed been described with reference to a practical example in the case of a television apparatus, but it is evident that the invention may be employed in a heterodyne sound radio receiver. In this case also, during the tuning operation there is the pulse sequence shown in Figure 4, which is dealt with by the control circuit 11 and influences the search sweep in the manner described. WHAT WE CLAIM IS:

1. A circuit arrangement suitable for use in an automatic heterodyne tuning circuit in which there are tuning means, the tuning frequency of which is variable in response to a tuning signal applied to the tuning means arranged to transpose a received radio frequency signal into an I.F. signal and an intermediate frequency (I.F.) circuit having a preset I.F.

pass range, the circuit arrangement comprising: a supervisory circuit having an input for receiving the I.F. signal from the I.F. circuit and an output arrangement for outputting different supervisory signals which the supervisory circuit selectively generates in dependence on whether the I.F. signal frequency is within or outside the said I.F. pass range and on which of a plurality of different frequency ranges within the said I.F. pass range the I.F. signal frequency falls; and a tuning signal control means having an input arrangement connected to receive the supervisory signals, the control means being operable to vary the tuning signal in dependence on the supervisory signals to cause the frequency of the I.F. signal to fall within a predetermined one of said ranges and to maintain it within that range.

2. An arrangement according to Claim 1, wherein the supervisory circuit has a further input for receiving a transmitter recognition signal indicating that the received radio frequency signal originates from a transmitter rather than interference, the supervisory circuit being arranged to operate in dependence on the recognition signal.

3. An arrangement according to Claim 1 or 2, wherein the supervisory circuit comprises

a frequency comparator having inputs for receiving a reference signal of predetermined reference frequency and the I.F. signal to produce a comparison signal representing the difference between the frequencies of the said I.F. signal and the reference signal, and signal producing means connected to receive the comparison signal and produce therefrom the supervisory signals.

4. An arrangement according to Claim 3 wherein the comparator comprises a quadrature demodulator.

5. An arrangement according to Claim 3 or 4 further comprising a reference signal source connected to an input of the frequency comparator.

6. An arrangement according Claim 3, 4 or 5 wherein the supervisory circuit is arranged to generate: a first signal when the I.F. signal frequency is within the I.F. pass range but less than a first predetermined frequency which is less than the reference frequency; a second signal when the I.F. signal frequency within the pass range is greater than or equal to the first frequency but less than or equal to a second predetermined frequency which is greater than the reference frequency or when the I.F. signal frequency is outside the pass range; and a third signal when the I.F. signal frequency is within the pass range and is greater than the second frequency.

7. An arrangement according to Claim 6, wherein the first and second frequencies differ from the reference frequency by the same amount.

8. An arrangement according to Claim 7, wherein the reference frequency is 38.9 MHz and the first frequency is 75 KHz to 100 KHz less, and the second frequency 75 KHz to 100 KHz more, than the reference frequency.

9. An arrangement according to any preceding claim wherein the supervisory signals are voltages.

10. An arrangement according to Claim 9 when appended to Claim 6, 7 or 8 wherein the first signal is about 0 volts, the second signal is a positive voltage greater than 0 volts and the third signal is a positive voltage greater than that of the second signal.

11. An arrangement according to any preceding claim wherein the control means comprises an input for receiving a start signal in response to which it varies the tuning signal.

12. An arrangement according to Claim 11, in combination with a manually operable switch connected to said input to provide the start signal.

13. An arrangement according to Claim 11 or 12, when appended to Claim 6, 7, 8, or to Claim 9 or 10 when appended to Claim 6, 7 or 8, wherein the control means is operable in response to the start signal to vary at a first rate the tuning signal in a first sense to correspondingly vary the tuning frequency of the tuning circuit until the control means has received the first, second and third signals consecutively, the control means being arranged to cause the change of the tuning signal to take place in a second sense opposite to the first upon the second signal being replaced by the third signal.

14. An arrangement according to Claim 13, wherein the control means is operable to vary the tuning signal at a second rate slower than the first in the second sense.

15. An arrangement according to Claim 14 wherein the control means is operable in response to the second signal being replaced by the third signal to vary the tuning signal in the second sense at the second rate until the second signal is replaced by the first signal whereupon it varies the tuning signal in the first sense but at a third rate slower than the second rate.

16. An arrangement according to Claim 15 wherein the control means is operable in response to the second signal being replaced by the first signal to vary the tuning in the first sense at the third rate until the first signal is replaced by the second signal whereupon it ceases to vary the tuning signal.

17. An arrangement according to any one of Claims 6, 7 and 8 and Claims 9 and 10 when appended to 6, 7 or 8 and Claims 11, 12, 13, 14, 15 and 16 wherein the control means is operable to vary the value of the tuning signal in such a manner as to maintain the frequency of the I.F. signal within the pass range so that the second signal is received by the control means, the control means being responsive to reception of the first and third signals to vary the tuning signal to regain reception of the second signal.

18. An arrangement according to any preceding claim wherein the control means comprises interpreting means connected to receive the supervisory signals and produce therefrom control signals representing the manner in which the tuning signal is to vary, means for producing the tuning signal, and a link circuit coupling the interpreting means to the tuning signal producing means and arranged to control the signal producing means in accordance with the control signals.

19. An arrangement according to Claim 18, wherein the signal producing means comprises an oscillator coupled to a counter, and a converter for converting the output of the counter into the tuning signal, the link circuit being arranged to control the rate and direction of counting in accordance with the control signals.

20. An arrangement according to Claim 18, wherein the signal producing means comprises an oscillator coupled to a frequency divider of programmable division ratio, and an integrator arranged to integrate the output of the frequency divider to produce the tuning signal.

21. An arrangement according to Claim 20, wherein the divider includes binary counters for setting the division ratio.

22. An arrangement according to Claims 18, 19, 20 or 21, wherein the control means mcludes a digital store for storing values of the tuning signal.

23. An arrangement according to any preceding claim, wherein the output arrangement of the supervisory circuit comprises a single output common to all the supervisory signals and the input arrangement of the control means comprises a single input common to all the supervisory signals.

24. An arrangement according to any preceding claim, wherein the supervisory circuit is constructed as an integrated circuit and the control means is also constructed as an integrated circuit.

25. An arrangement according Claim 24, wherein the supervisory circuit is constructed as a bipolar integrated circuit and the control means as an MOS integrated circuit.

26. An arrangement according to any preceding claim in combination with tuning means connected to receive the tuning signal in response to which the tuning frequency is variable, and an I.F. circuit connected between the tuning means and the supervisory circuit.

27. An arrangement according to Claim 26, wherein the tuning means comprises capacitance diodes.

28. An arrangement according to Claim 2 or any one of Claims 3 to 27 when directly or indirectly appendant thereon, in combination with a transmitter recognition circuit connected to provide the transmitter recognition signal to the supervisory circuit.

29. An arrangement according to Claim 1 and substantially as hereinbefore described with reference to the accompanying drawings.

30. A television receiver comprising an arrangement according to any preceding claim.

31. A radio receiver comprising an arrangement according to any preceding claim.