GB1592575A - Level-controlled amplifier or attenuator circuits - Google Patents
Level-controlled amplifier or attenuator circuits Download PDFInfo
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- GB1592575A GB1592575A GB3848277A GB3848277A GB1592575A GB 1592575 A GB1592575 A GB 1592575A GB 3848277 A GB3848277 A GB 3848277A GB 3848277 A GB3848277 A GB 3848277A GB 1592575 A GB1592575 A GB 1592575A
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- 239000003990 capacitor Substances 0.000 claims description 25
- 230000003321 amplification Effects 0.000 claims description 24
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 24
- 230000005669 field effect Effects 0.000 claims description 19
- 238000010079 rubber tapping Methods 0.000 claims description 16
- 230000008878 coupling Effects 0.000 claims description 10
- 238000010168 coupling process Methods 0.000 claims description 10
- 238000005859 coupling reaction Methods 0.000 claims description 10
- 230000001105 regulatory effect Effects 0.000 claims description 10
- 230000001419 dependent effect Effects 0.000 claims description 8
- 230000000694 effects Effects 0.000 claims description 8
- 230000002238 attenuated effect Effects 0.000 claims description 7
- 239000013643 reference control Substances 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 230000007613 environmental effect Effects 0.000 claims description 4
- 230000008901 benefit Effects 0.000 claims description 3
- 230000006378 damage Effects 0.000 claims description 2
- 230000001052 transient effect Effects 0.000 claims description 2
- 230000005855 radiation Effects 0.000 claims 1
- 101100484930 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) VPS41 gene Proteins 0.000 description 8
- 238000010276 construction Methods 0.000 description 3
- 230000009471 action Effects 0.000 description 1
- 230000001795 light effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3005—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers
- H03G3/301—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers the gain being continuously variable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0035—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
- H03G1/0052—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using diodes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0035—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
- H03G1/007—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using FET type devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/02—Manually-operated control
- H03G3/04—Manually-operated control in untuned amplifiers
- H03G3/10—Manually-operated control in untuned amplifiers having semiconductor devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3005—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers
- H03G3/301—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers the gain being continuously variable
- H03G3/3015—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers the gain being continuously variable using diodes or transistors
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Amplifiers (AREA)
- Networks Using Active Elements (AREA)
Description
(54) IMPROVEMENTS IN OR RELATING TO LEVEL-CONTROLLED
AMPLIFIER OR ATTENUATOR CIRCUITS
(71) We, SIEMENS
AKTIENGESELLSCHAFT, a German
Company of Berlin and Munich, German
Federal Republic, do hereby declare the invention for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following state ment :- The invention relates to level-controlled amplifier or attenuator circuits of the type wherein the amplification or attenuation level is determined at any instant by the resistance value of a controllable resistor adjusting element.
In known amplifiers or attenuator circuits (such as voltage dividers) of this type, the controllable element may be a diode, transistors, or n.t.c. resistor, for example fluctuations in the environmental temperature influence the circuit characteristic values to such an extent that a temperatureindependent amplification setting, or setting of the division ratio in voltage dividers, is not easy to achieve.
One object of the present invention is to provide an amplifier or attenuator of the type referred to in the introduction, whose construction is such that its amplification or division ratio can be readily varied and set in a temperature-independent and stable fashion.
The invention consists in a levelcontrolled amplifier or attenuator circuit of the type in which amplification or attenuation level is determined by the resistance value of a controllable resistance adjusting element, said circuit having a signal path, from a pair of input terminals to a pair of output terminals, and a shunt path containing said adjusting element, the input end of said signal path having applied thereto both a d.c. voltage and an a.c. voltage, one of which is the signal to be amplified or attenuated and the other one of which serves as a reference signal, the output end of said signal path branching to form an a.c.
output path and a separate d.c. output path, at least one of which output paths leads to said pair of output terminals, and the other one of which output paths serves to provide a d.c. control voltage which is to be maintained at a constant amplitude and is applied to a first input of a differential amplifier whose second input is connected to an adjustable d.c. reference control voltage, said controllable resistance element being set by the output voltage of the differential amplifier to a resistance value which is such that the input voltages of the differential amplifier are substantially equal, said controllable resistance having substantially equal resistance values for d.c. and a.c.
signals.
A circuit constructed in accordance with the invention offers the particular advantage that the temperature coefficients of the controllable resistor employed as adjusting element can be compensated for automatically by selection of the operating properties of the circuit. The non-linearities of the setting-up characteristics are then of no significance, so that a linear amplification setting is possible. Furthermore, any production tolerances allowed for individual adjusting elements are automatically compensated, so that the full functioning capacity of each individual circuit is achieved with a minimum of adjustment. Furthermore, an amplifier or attenuator circuit constructed in accordance with the invention can be provided with an input for varying the level of amplification or attenuation modulation voltage, so that it emits a correspondingly amplitude-modulated a.c. voltage.
The invention will now be described with reference to the drawings, in which:
Figure 1 schematically illustrates a first exemplary embodiment of the invention in the form of an a.c. amplifier circuit;
Figure 2 schematically illustrates a second exemplary embodiment of the invention, in the form of a d.c. amplifier circuit;
Figure 3 schematically illustrates a further exemplary embodiment of the invention in the form of an a.c. amplifier circuit;
Figure 4 schematically shows a modified circuit using a different adjusting element to that used in the embodiments shown in
Figure 1 to 3;
Figure 5 schematically illustrates a first exemplary embodiment of an attenuator circuit which serves as a potential divider with controllable attenuation level for a.c.
voltages; and
Figure 6 schematically illustrates an exemplary embodiment of an attenuator circuit which serves as a potential divider with a controllable attenuation level for d.c. voltages.
The embodiment illustrated in Figure 1 shows an a.c. voltage amplifier circuit controllable in respect of its level of amplification and containing an operational amplifier 1. The latter possesses a feedback arm containing a resistor 1 leading to its inverting input, which is also connected to earth via the source-drain path of a field effect transistor FET1 having an n.doped channel, whereas the non-inverting input is connected via a coupling capacitor C1 to the line terminal of a pair of circuit input terminals 2, one terminal of which is connected to earth. The output of the amplifier 1 leads via a coupling capacitor C2 to a pair of output terminals 3, one of which is earthed.The output of the amplifier 1 is connected via a low-pass filter TP to a negative input of a differential amplifier 4, which is of symmetrical construction, possesses a very high degree of amplification, and whose positive input is connected to a tapping 5 of a potentiometer P1, which latter is connected to a reference voltage Ur.
The output of the differential amplifier 4 leads via a series resistor R2 to the gate of a field effect transistor FET1, with a rectifier
G and a capacitor C3 in respective shunt paths. The reference voltage Ur is also divided in an ohmic potential divider formed by resistors R3 and R4 to provide a reference voltage UO fed to the noninverting input of the amplifier 1.
An input a.c. voltage Ue present across the circuit input terminals 2 is amplified in the amplifier 1 and emitted via output terminals 3 as an output voltage Ua. The reference control d.c. voltage UO which passes through the amplifier 1 is amplified to form a voltage v.UO, where v = d.c.
voltage amplification and when filtered by a low-pass filter TP and thus reaches the negative input of the differential amplifier 4.
The output voltage of the latter influences the resistance value of the transistor FET1 in such manner that the voltage v.UO is substantially equal to the voltage UF which has been obtained from the tapping 5 from the reference voltage UO As UO is constant, an appropriate setting of the tapping 5 of the potentiometer P1 makes it possible to produce a specific d.c. voltage amplification v.
If the field effect transistor FET1 is assumed to present a resistance value at any instant that is set via the output voltage of the amplifier 4, such that it is substantially equal for d.c. and a.c. then the a.c. voltage amplification also corresponds to the set value v. The regulating circuit comprising amplifier 1 and components TP, 4, 5, P1, R2 and FET1, causes an amplification which is substantially equal for d.c. and a.c. signals, and is dependent solely upon the reference control voltage UF, which represents a guide value fed to the regulating circuit. Further circuitry details, and in particular the nonlinearity of the setting-up characteristic of the transistor FET1, and the temperature coefficients or exemplary production deviations of the amplifier 1 or the transistor
FET1 have virtually no influence upon the amplification set up in linear fashion at the point 5.If the positive input of the amplifer 4 is supplied via an auxiliary circuit input 6 with a modulation voltage Urn, for example a signal varying in accordance with a predetermined time function, then at the output 3 there is obtained an a.c. voltage Ua which is amplitude-modulated in dependence upon Urn without the aforementioned nonlinearities and temperature coefficients having any disturbing effect.
The function of the rectifier G is to short-circuit any positive output voltages at the output of the amplifier 1 which are produced for example, by switch-on current surge transients, in order to prevent any disturbance of the field effect transistor
FET1. Capacitor C3 suppresses interferences caused by higher-frequency a.c. voltage components or noise components which can likewise occur at the output of the amplifier 4. These elements may need to be carefully selected, or omitted, if the input 6 is used for modulation.
The embodiment shown in Figure 2 illustrates a modification of the circuit shown in
Figure 1, in which the input voltage Ule which is to be amplified and is present at the input end does not represent an a.c. voltage signal but is a d.c. voltage signal, supplied to the non-inverting input of 1 via an input resistor R5. The same input of the amplifier 1 is fed via a resistor R6 with a reference a.c.
voltage Uw which is produced by a generator 7 and possesses a predetermined, constant amplitude, and in this case represents the reference control signal. At the output of the amplifier 1, the amplified d.c. voltage signal v.U'e is selectively tapped via a low-pass filter TP and fed to the circuit output terminals 3. The amplified a.c. voltage signal v.Uw is tapped out via a coupling capacitor C2', exactly rectified in a rectifier circuit 8, and fed to the negative input of the differential amplifier 4. The substantially equivalent values of the signal emitted from the rectifier 8 to the adjustable voltage UF, which takes place through the action of the regulating circuit comprising the amplifier 1 and components C2', 8, 4, 5, P1, R2 and
FET1 in this case brings about an a.c.
voltage amplification for Uw which can be exactly set by the potentiometer P1, and which, on account of the substantially identical resistance value of the transistor FET1 for a.c. and d.c. signals, is identical to the d.c. voltage amplification for U'e. A modulation voltage Urn which may be fed via the auxiliary circuit input 6 to the positive input of the differential amplifier 4 can be used to modulate the amplitude of the amplified a.c. voltage signal v.Uw which is tapped at a circuit output terminal 3'.
The a.c. voltage amplifier embodiment illustrated in Figure 3 possesses two transistors TS1 and TS2 of opposite conductivity type. The first transistor TS1 is assigned a voltage divider formed by resistors R7, R8 and R10, which defines the base potential when the supply or reference voltage +UB is applied, and is provided with an emitter resistor R9 which is connected to supply terminal +UB. A resistor R10 serves as a collector resistor which is connected to earth and is shunted by a capacitor C4. The emitter of the transistor TS1 is connected to the base of the second transistor TS2, whose collector is connected via a collector resistor
R11 to the terminal +UB, whereas its emitter is connected to earth via the parallel arrangement of a resistor R12 and a field effect transistor FET2.An a.c. voltage Uk' connected to the circuit input terminals 9 is fed via a coupling capacitor C5 to the base of the first transistor TS1 and is amplified on passing through the transistor circuit to be supplied at the collector of the second transistor TS2, and is transmitted via a coupling capacitor C6 to circuit output terminals 10, at which it is available as an a.c. output voltage Uá. Here, the characteristic values of the transistors TS1 and TS2 have been selected and the transistors are expediently thermally coupled in such manner that any temperature-dependent fluctuation of the base-emitter voltage of the transistor TS2 is compensated by a corresponding fluctuation of the base-emitter voltage of the transistor TS1.As the base of the transistor TS1 carries a fixed potential which is independent of temperature, the potential across the emitter of the transistor TS2 is then also independent of the environmental temperature.
In addition to the a.c. input voltage signal Uá, the operating supply voltage +Ug is divided by the resistor chain R7, R8 and
R10 to provide a constant value U0 connected, as a reference control signal to the base of the transistor TS1, and is tapped in amplified form at the collector of the transistor TS2 to be fed via a low-pass filter, comprising a resistor R13 and capacitor C7, to the positive input of a differential amplifier 11 which is of symmetrical construction and possesses a high degree of amplification. The negative input of the amplifier 11 is connected to a tapping 12 of a potentiometer P2, across which is applied the operating voltage +UB. The output of the differential amplifier 11 is connected via a series resistor R14 to the gate of the controllable transistor FET2.The diode G' and capacitor C3' which are arranged in shunt lines fulfil the same function as the elements G and C3 shown in the embodiments illustrated in Figures 1 and 2.
If it is assumed that the transistor TS1 does not amplify the signals present at the input end, but merely effects an impedance transformation and a temperature compensation of the base-emitter path of the transistor TS2, then the amplification of the circuit lying between input 9 and output 10 is governed by the characteristic values of the transistor stage TS2, which is provided with a current feedback. In detail, the amplification v is represented by the equation:
v = Ril/RE (1)
where R11 is the resistance value of the collector resistor; and
RE is the resistance value of the emitter resistor formed from the parallel arrangement of the fixed resistor R12 and the controllable transistor FET2.Here it has been assumed that the base current of the transistor TS2 is substantially lower than the collector current, and that the base-emitter voltage of the transistor TS2 is constant. If the collector resistance value R11 is expressed by:
R11 = Uo"Ac (2)
where U0 is the voltage which drops across the collector resistor R11 of the transistor TS2, and ie is the collector current of the transistor
TS2; and if it is assumed that:
RE = U"'o/ie (3)
where U"' is the temperatureindependent, substantially constant voltage at the emitter of the transistor TS2, and ie is the emitter current of the transistor
TS2;
so that when equations (2) and (3) are substituted into (1), assuming that i, is at least virtually equal to ic, the d.c. voltage amplification v is governed by the following equation: - v = U"lU'o' = k. U'' (4)
where k represents a constant.As a result of the effects of the regulating circuit comprising the components and circuit points
TS2, Rut1, R13, C7, 11, 12, P2, R14, FET2 and R12, then the voltage +Ul3-U < ' present at the positive input of the amplifier 11 is set to the fraction Uf of the voltage +Ug which is connected to the potentiometer P2 set at the tapping 12, so that the voltage U'., and thus the d.c. amplification v at the tapping 12, can be set in a temperature-independent and linear fashion. As the a.c. resistance of the transistor FET2 is substantially identical to its d.c. resistance, the equation (4) also applies to the a.c. amplification of the circuit illustrated in Figure 3.If a modulation voltage U' is connected via an auxiliary input to the negative input of the differential amplifier 11, a correspondingly amplitudemodulated a.c. voltage U.' is obtained at the output terminals 10 of this embodiment.
When the field effect transistors FET1 and FET2 are employed, as in the embodiments shown in Figure 1 to 3, it is of substantial significance that their d.c. and a.c. resistances are substantially equal.
Therefore it is necessary that their modulation should not continue into the saturation range of their output characteristic curve
Jd/Uds;
where Jd iS the drain-current and Ud the drain-source voltage. Therefore the reference voltage Ur in Figure 1 and the voltage +UB in Figure 3 should be selected in dependence upon the values of U,, and UO.
Figure 4 schematically illustrates one alternative form of adjusting element which can replace the field effect transistors FET1 and FET2 shown in the embodiments illustrated in Figure 1 to 3, and possesses virtually identical a.c. and d.c. resistances.
This is a light-dependent resistor RL, which is also referred to as photo-resistor. The latter is employed in place of the sourcedrain path of the transistors FET1 and FET2 in the previously described circuits. The resistance value of this clement R, is controlled via a lumincscent diode D, or other light source, which is inserted into the collector circuit of a transistor TS3, which circuit is connected to the negative pole Uu of the operating voltage source. The emitter of the transistor TS3 leads across an emitter resistor R15 to the supply terminal +UB. The base current which modulates the transistor TS3, and which controls the intensity of the light effect on the element RL iS derived from the differential amplifier 4 in
Figures 1 and 2 or in Figure 3, via a series resistor R16.A shunt path capacitor C8 serves to suppress undesired a.c. components. The adjusting element RL in Figure 4 permits application in circuit arms which carry high d.c. and a.c. voltages, as it does not exhibit any significant saturation characteristic.
In Figure 5 the current input terminals 2 lead via a coupling capacitor C1 to a first divider resistor R1', which is connected via a second coupling capacitor C2 to the circuit output terminals 3. A controllable nchannel-field effect transistor FET has its source-drain path inserted into a shunt arm connected between the series resistor R1' and the output coupling capacitor C2 thus representing a second, controllable divider resistor arranged in parallel with the output circuit between the terminals 3. At the connection point of the resistor R1' and the capacitor C2 there is further connected a low-pass filter TP, whose output is connected to the negative input of a differential amplifier 4 having a high degree of amplification.The positive input of the amplifier 4 leads to the tapping 5 of a potentiometer P1, across which is applied a reference voltage
Ur. The reference voltage Ur is connected via a line L to the connection point of the capacitor C1 and resistor R1'. The output of the differential amplifier 4 leads via a series resistor R2 to the gate of the controllable element FET, with a shunt rectifier G and capacitor C3 arranged in respective shunt paths, as described above.
An a.c. voltage Uc applied to the circuit input terminals 2 is fed to the series combination of resistor R1' and transistor element FET, and the attenuated level of the signal Uc, which is formed across the trans sistor FET is fed out as the output voltage U, at terminals 3.At the same time, the reference voltage Ur which is fed in a reference as control voltage at the junction between C1 and R1', is divided by the combination of R1' and FET, and the attenuated component of Ur which is formed across the transistor FET is passed via the low-pass filter TP to the negative input of the differential amplifier 4, whose output voltage then influences the resistance value of the transistor FET in such manner that the component of Ur arriving via the filter TP is substantially equal to the portion
UF of the reference voltage Ur which is obtained at the tapping 5 of the potentiometer P1. As Us is constant, by means of an appropriate setting of the tapping 5 it is able to produce a specific divider ratio by the selected division of Ur.If it is assumed that the resistance value of the field effect transistor FET is in each case set via the output voltage of the amplifier 4 to a respective value that is substantially equal for d.c. and a.c., the divider ratio determined for Ur will be equal to the divider ratio for Ue. Here the regulating circuit Tri', FET, TP, 4, 5, P1 and R2 ensures that the divider ratio, which is equal for d.c. and a.c.
is dependent solely upon the voltage UF which represents a control setting for the regulating circuit. Other circuitry details, and in particular any non-linearity of the setting-up characteristic of the FET, its temperature coefficients or production tolerance variations have no significant influence upon the divider ratio that can be set in linear fashion at the tapping 5.If the positive input of the differential amplifier 4 is connected to a further circuit input terminal 6 at which a modulation voltage Urn may be applied, then at the output 3 there is obtained an a.c. voltage Ua which is amplitude-modulated in dependent upon Urn without the non-linearity of the settingup characteristic of the FET, or of differences in characteristic values due to production tolerances or fluctuations in the environmental temperature having any significant disturbing effect.
The function of the rectifier G is to short-circuit any positive voltage excursions at the output of the amplifier 4, which can be caused for example by switch-on transient current surges, in order to prevent the destruction of the field effect transistor
FET. Capacitor C3 suppresses any interference due to higher-frequency a.c. voltage components or noise components, which can likewise occur at the output of the amplifier 4. The value of any modulating signal Urn that is applied must be selected to avoid position output excursions, and the value of the capacitor C3 will need to be selected appropriately if a modulation signal is to be applied.
The alternative embodiment shown in
Figure 6 differs from that shown in Figure 5, in that it is intended for d.c. voltage signals Ué, which may be applied to the input 2 and fed to the resistance combination of R1' and
FET, which is also supplied with an a:c.
reference voltage Uw possessing a predetermined, constant amplitude, and produced by a generator 7 whose output is fed in via a capacitor C9. The divided d.c. output voltage is fed out via a low-pass filter TP' to the circuit output 3. The divided a.c. voltage signal is tapped out via a coupling capacitor
C2', exactly rectified in a rectifier circuit 8, and applied to the negative input of the differential amplifier 4. The regulating circuit comprising R1', FET, C2', 8, 4, 5 P1 and R2 produces substantial matching of the signal emitted from the rectifier stage 8 and the control voltage UF to set an attenuating divider ratio for the a.c. reference voltage
Uw, which ratio can be exactly set by adjustment of P1, and, on account of the subtantially identical resistance values of the transistor FET for a.c. and d.c. signals, is identical to the divider ratio for the d.c.
input voltage signal Ué. The setting of the divider ratio at the tapping 5 is carried out in linear fashion and uninfluenced by any non-linearities of the setting-up characteristic of the FET and independent of temperature fluctuations or exemplary strayings of this field effect transistor. If modulation voltage Urn is fed via the circuit input 6 to the positive input of the differential amplifier 4 it will modulate the amplitude of the attenuated d.c. voltage signal Uw, which can be fed out via circuit output terminals 3'.
The circuit elements G and C23 serve the same purpose as described with reference to
Figure 5.
When the field effect transistor FET is employed as in the embodiments shown in
Figures 5 and 6, the same conditions apply as described with reference to Figures 1, 2 and 3, namely, that its d.c. and a.c. resistances are substantially equal. Therefore it is necessary that it should not be modulated into the saturation range of its output characteristic curve Id/Uds, where Id is the drain current and Uds is the drain-source voltage.
The modified arrangement with a photoresistor shown in Figure 4 can be used with equal effect as a substitute replacing the field effect transistor FET in the embodiments shown in Figures 5 and 6, with similar advantage regarding absence of saturation problems.
WHAT WE CLAIM IS:
1. A level-controlled amplifier or attenuator circuit of the type in which amplification or attenuation level is determined by the resistance value of a controllable resistance adjusting element, said circuit having a signal path, from a pair of input terminals to a pair of output terminals, and a shunt path containing said adjusting element, the input end of said signal path having applied thereto both a d.c. voltage and an a.c.
voltage, one of which is the signal to be amplified or attenuated and the other one of which serves as a reference signal, the output end of said signal path branching to form an a.c. output path and a separate d.c.
output path, at least one of which output paths leads to said pair of output terminals, and the other one of which output paths
**WARNING** end of DESC field may overlap start of CLMS **.
Claims (12)
1. A level-controlled amplifier or attenuator circuit of the type in which amplification or attenuation level is determined by the resistance value of a controllable resistance adjusting element, said circuit having a signal path, from a pair of input terminals to a pair of output terminals, and a shunt path containing said adjusting element, the input end of said signal path having applied thereto both a d.c. voltage and an a.c.
voltage, one of which is the signal to be amplified or attenuated and the other one of which serves as a reference signal, the output end of said signal path branching to form an a.c. output path and a separate d.c.
output path, at least one of which output paths leads to said pair of output terminals, and the other one of which output paths
serves to provide a d.c. control voltage which is to be maintained at a constant amplitude and is applied to a first input of a differential amplifier whose second input is connected to an adjustable d.c. reference control voltage, said controllable resistance element being set by the output voltage of the differential amplifier to a resistance value which is such that the input voltages of the differential amplifier are substantially equal, and said controllable resistance having substantially equal resistance values for d.c. and a.c. signals.
2. A circuit as claimed in Claim 1, in which said controllable resistance acts to determine the gain of an amplifier comprising said circuit.
3. A circuit as claimed in Claim 2, in which an operational amplifier is provided with a feedback arm containing a series resistor connected to its inverting input, which inverting input is connected to earth via said controllable resistance element.
4. A circuit as claimed in Claim 2, in which a first transistor amplifier stage containing a transistor of one conductivity type drives a second transistor of opposite conductivity type that is provided with current feedback said transistors being thermally coupled in such manner that the temperature-dependent fluctuations of the baseemitter voltages of the two transistors provide mutual compensation, said reference control voltage of constant amplitude, which is fed to the input of the circuit providing the base bias voltage of the first transistor and that the controllable resistance element connected in parallel with a fixed resistor to form a current feedback resistance path for the second transistor stage.
5. A circuit as claimed in Claim 1, in which said controllable resistance element acts to determine the attenuation of a voltage divider comprising said circuit.
6. A circuit as claimed in Claim 5, in which said adjustable control voltage is obtained via an adjusting tapping of a potentiometer connected to a reference voltage that is fed said reference as control voltage to the input of said voltage divider.
7. A circuit as claimed in Claim 5 or
Claim 6 as ohmic in which a fixed resistor is connected in series with said controllable resistance element, and their junctions provides the output of the circuit.
8. A circuit as claimed in any preceding
Claim, in which said controllable resistance
element consists of a field effect transistor.
9. A circuit as claimed in Claim 8, in which the output of said differential amplifier is connected in parallel with a rectifier of such polarity that any output voltage components having a polarity which would destroy the field effect transistor are suppressed.
10. A circuit as claimed in any one of
Claims 1 to 7, in which said controllable resistance element consists of a lightdependent resistor which is fed via a light source whose radiation is controlled by the output voltage of said differential amplifier.
11. A circuit as claimed in any preceding
Claim, in which the control voltage is fed to said differential amplifier input is superimposed upon a modulation signal applied via an auxiliary input and so provide an amplitude-modulated a.c. output voltage from said circuit.
12. A level-controlled amplifier or attenuator circuit substantially as described with reference to Figure 1, 2, 3 5 or 6, or as modified with reference to Figure 4.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19762641525 DE2641525C3 (en) | 1976-09-15 | 1976-09-15 | Amplifier with adjustable gain |
| DE19762641535 DE2641535A1 (en) | 1976-09-15 | 1976-09-15 | Voltage divider with variable division ratio - has AC test voltage applied to divider to control variable resistance |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1592575A true GB1592575A (en) | 1981-07-08 |
Family
ID=25770905
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB3848277A Expired GB1592575A (en) | 1976-09-15 | 1977-09-15 | Level-controlled amplifier or attenuator circuits |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB1592575A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2123231A (en) * | 1982-06-17 | 1984-01-25 | Ates Componenti Elettron | Gain control of audio-amplifying systems |
| US4870369A (en) * | 1987-10-26 | 1989-09-26 | Siemens Aktiengesellschaft | Circuit arrangement having a pre-amplifier connected to an opto-electric transducer |
| GB2225187A (en) * | 1988-11-18 | 1990-05-23 | Mitel Corp | Agc circuit |
-
1977
- 1977-09-15 GB GB3848277A patent/GB1592575A/en not_active Expired
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2123231A (en) * | 1982-06-17 | 1984-01-25 | Ates Componenti Elettron | Gain control of audio-amplifying systems |
| US4870369A (en) * | 1987-10-26 | 1989-09-26 | Siemens Aktiengesellschaft | Circuit arrangement having a pre-amplifier connected to an opto-electric transducer |
| GB2225187A (en) * | 1988-11-18 | 1990-05-23 | Mitel Corp | Agc circuit |
| GB2225187B (en) * | 1988-11-18 | 1993-07-07 | Mitel Corp | Agc circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| PCNP | Patent ceased through non-payment of renewal fee |