GB1588781A - Automatic power transfer control device for selectively energising a network from a pair of electrical power sources - Google Patents

Description

(54) AUTOMATIC POWER TRANSFER CONTROL DEVICE FOR SELECTIVELY ENERGISING A NETWORK FROM A PAIR OF ELECTRICAL POWER SOURCES (71) We, WESTINGHOUSE ELECTRIC CORPORATION of Westinghouse Building, Gateway Center, Pittsburgh, Pennsylvania, United States of America, a company organised and existing under the laws of the Commonwealth of Pennsylvania, United States of America, do hereby declare the invention, for which we pray that a patent may granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to automatic power transfer control devices for selectively energising an electrical distribution system from a pair of electrical power sources.

In suppyling electrical power to industrial and commercial facilities, it is often desirable to provide alternate sources of electrical power to ensure continuity of service. Sometimes these sources may comprise separate feeder circuits from the electric utility company. In other situations one or more diesel generators may be provided as alternate sources. Means must be provided to switch the distribution system between the alternate sources, and it is often desirable to provide this switching capability as an automatic function. Thus, if the primary power source should fail, the transfer control device will automatically switch the distribution system from the primary to the alternate source.In order to provide the desired features for each individual installation many options are often specified, including automatic retransfer when the primary source once again returns to normal, time delay before switching, interlocking to prevent the load from being connected on a transient basis to both sources at the same time, automatic startup of diesel generators, division of the load between the sources and others.

In providing an automatic power transfer control device for a specific application, it was usually necessary to engineer a custom design for each application, selecting various relays and components to provide the desired features. Prior art automatic power transfer control devices have sometimes provided a certain degree of flexibility, but have often required auxiliary relays and components. In addition, prior art automatic power transfer control devices employing electromechanical logic components have required substantial amounts of power. It would be desirable to provide an automatic power transfer control device having sufficient flexibility to handle a wide variety of power transfer control applications including both two-breaker schemes and three-breaker schemes having two sources and two loads.

In addition, in prior art devices it was often difficult to verify the operability of the device without initiating a transfer. It would therefore be desirable to provide an automatic power transfer control device including means for testing the device without actually initiating transfer.

It is the principal object of this invention to provide an improved automatic power transfer control device for generating signals to cause associated circuit interrupters to selectively energise an electrical distribution network from a plurality of electrical power sources.

With this object in view, the invention resides in an automatic power transfer control apparatus for selectively energising an electrical distribution network from a pair of electrical power sources through associated circuit interrupters, comprising: first source sensin means for sensing electrical parameters of one of said electrical power sources; second D source sensing means for sensing electrical parameters of the other of said electrical power sources; a plurality of means for generating output control signals for said associated circuit interrupters to selectively connect and disconnect said electrical power sources to said distribution network, characterized in that the apparatus includes digital logic means for activating said output control signal generating means in response to changes in electrical parameters of said sources detected by said sensing means; and means fpr programming said logic means to automatically command said output control signal generating means to selectively produce any of a predetermined set of output signal combinations in response to a predetermined set of electrical parameters of said electrical power sources.

The invention will become readily apparent to those skilled in the art from the following description of an exemplary embodiment thereof when read in conjunction with the accompanying drawings, in which: Figure 1 is a block diagram of an electrical distribution system having two alternate sources of electrical power and utilizing two circuit interrupters to supply a single load; Figure 2 is a block diagram of an electrical distribution system employing two alternate sources of electrical power and three circuit interrupters to supply two loads; Figure 3A is a schematic drawing showing external connections to an automatic power transfer control device employing the principles of the present invention; Figure 3B is a functional schematic drawing showing signal flow through the device of Figure 3A;; Figure 3C is a detail functional schematic drawing showing the signal flow through the voltage, frequency, and timing logic of the device shown in Figures 3A and 3B; Figure 4 is a schematic diagram of the power supply circuitry of the automatic power transfer control device of Figure 3B Figure 5 is a schematic diagram of the voltage sensing logic circuitry of the device of Figure 3B; Figure 6 is a phasor diagram of the voltages sensed by the circuitry of Figure 5; Figure 7 is a schematic diagram of the frequency sensing logic circuitry; Figure 8 is a schematic diagram of the main breaker logic circuitry; Figure 9 is a schematic diagram of the timing logic circuitry; Figure 10 is a schematic diagram of the tie breaker logic circuitry; Figure 11 is a schematic diagram of the automatic power transfer control logic circuitry;; Figure 12 is a schematic diagram of the interface circuitry; and Figure 13 is a perspective view of the automatic power transfer control device.

1. GENERAL DESCRIPTION: In Figure 1 there is shown a multiphase electrical distribution system 10 including an automatic power transfer control device 12 (hereinafter referred to as an ATC) embodying the principles of the present invention. The system 10 includes a multiphase electrical load 14 which could be a single piece of apparatus such as a computer or a much larger building such as a factory, hospital, or shopping center. The load 14 is supplied from either of two alternate multiphase electrical sources 16 and 18, which could be transformers or diesel-powered electrical generators. The sources 16 and 18 are selectively connected to the load 14 through first and second main circuit breakers 52-1 and 52-2. The circuit breakers 52-1 and 52-2 are operated by the automatic power transfer control (ATC) device 12 according to the status of the sources 16 and 18.The automatic power transfer control 12 senses electrical conditions of the sources 16 and 18 through connections 24 and 26. The parameters sensed by the ATC include voltage on each phase, phase sequence and frequency. Logic circuitry within the ATC acts to select the highest quality source to supply power to the load 14.

Figure 2 shows a multiphase electrical distribution system l1 similar to the system 10 shown in Figure 1. In the system 11, however. there are two electrical loads 28 and 30 connected by a tie connection 32. A tie breaker 52-T is provided to selectively interconnect the two loads 28 and 30.

In the system 11 shown in Figure 2 a variety of configurations are possible. With both main breakers 52-1 and 52-2 closed and the tie breaker 54-T open. the first load 28 will be connected to the first source 16 and the second load 30 will be connected to the second source 18. Alternatively, with the first main breaker 52-1 open, and the second main breaker 52-2 and the tie breaker 54-T closed. both of the loads 28 and 30 will be supplied through the source 18. With main breaker 52-1 and tie breaker 52-T closed and main breaker 52-2 open. both loads 28 and 30 will be supplied through the source 16.

The ATC comprises voltage and frequency sensors for each source, the sensors being connected to the associated source through potential transformers. A plurality of input and output terminals are provided to supply the ATC with information concerning the status (open or closed) of associated circuit breakers, the desired action to be taken upon failure of the sources, the type of distribution system being controlled, etc. Outputs from the ATC include close and trip signals for each breaker, and generator start signals. Each input signal is 120 volts A. C. for high noise immunity and is converted by interface circuitry to 12 volts D.C. for compatibility with logic circuitry. Output signals are also 120 volts A.C.

The ATC is connected through power transformers to each source and contains logic to select the best source at any given time to supply control power to the ATC.

A plurality of timing functions are provided to permit selection of a wide range of time delay transfer and control actions. These timing functions are provided by a plurality of oscillators, one oscillator associated with each function, each being connected to a common digital counter.

In Figures 3A, 3B, and 3C there is shown a schematic functional diagram of the ATC 12 connected to a three-breaker, four-wire electrical distribution network as shown in Figure 2. The ATC 12 is connected through three-phase potential transformers 40, 42 and phase and neutral conductors 44, 46 to the first and second electrical sources 16 and 18 (not shown in Figure 3A). A mode selector switch 43 shown in the lower left of Figure 3A is provided to selectively switch the ATC 12 between automatic, manual, and live test modes. The potential transformers 40 and 42 supply voltage and frequency inputs from the respective sources to provide a signal through input terminals A9 through A12, and B1 through B4 to the ATC to determine if the source is at normal voltage and frequency and has proper phase rotation.Normal voltage is defined as the minimum operating voltage at which the customer desires the system to operate, as selected on the voltage pickup rheostats R578.

The ATC includes two identical sets of circuitry for voltage and frequency monitor, timing logic, control power logic, control power output, auxiliary transfer input, and generator start logic, with one set of circuitry for each source as will be described in detail hereinafter. In addition, it contains close and trip output signal capabilities for each of two main breakers, and the tie breaker; even though the tie breaker capabilities may not be used in each application. The means of adapting the ATC to operate from either two-or-three-breaker systems will be described in greater detail hereinafter.

2. DESCRIPTION OF OPERATION: 2.1 Voltage and phase sensor inputs Each source input includes two programming switches to set the voltage and wiring configuration of the system being connected thereto. The programming switches PS-9 and PS-10 select either three-wire (three phase conductors) or four-wire (three phase conductors and one neutral conductor) systems; the programming switches PS-11 and PS-12 select either 120 volt or 69 volt input voltage levels. Thus, there are four different ways to connect the voltage and frequency inputs A9-A12 and B1-B4: 1) For use with a system voltage of 480/277V, using 3 potential transformers (PT's) with a 4-1 ratio which are connected in a Y-Y fashion (also known as star-star). The input from the secondary of the PT's will be a 4-wire connection, with the voltage on the secondary of the PT's being 69V, phase to ground.The programming switches are then set for 4-wire, 69V operation.

2) For use with a system voltage of 480/277V, using 3-PT's with a 2.4-1 ratio which are connected in a Y-Y fasion. The input from the secondary of the PT's will be a 4-wire connection with the voltage of the PT's being 120V phase to ground. The programming switches are then set for 4-wire, 120V operation.

3) For use with a system voltage of 208/120V with no PT's. Connection from the sources will be 4-wire, with the voltage being 120V phase to neutral. The programming switches are then set for 4-wire, 120V operation.

4) For use with a system voltage of 480V, using 2 PT's with a 4-1 ratio which are connected in an open delta fashion. The input from the secondary of the PT's will be a 3-wire connection, with the voltage on the secondary of the PT's being 120V phase to ground. The programming switches are then set for 3-wire, 120V operation.

Four L.E.D.'s (Light Emitting Diodes) are supplied for each source. When lighted, one L.E.D. will indicate that the phase sequencing is correct. The other three L.E.D.'s are marked phase A, phase B and phase C and are lighted when their respective phase voltages are normal. For instance, if a voltage loss occurred on phase A, with phase B and phase C still at normal voltage, the phase A L.E.D. would extinguish, indicating that phase A was below normal. The phase B and C L.E.D.'s would remain lighted.

Two voltage adjusting rheostats R578 and R577 are provided for each source for voltage pick-up and voltage dropout, respectively. Voltage pick-up is the level to which a phase voltage must rise for the ATC to recognize it as having returned to normal. The voltage pick-up rheostat is adjustable from 90% to 98% of rated voltage. The voltage drop-out rheostat is adjustable from 65% to 90% of rated voltage.

2.2 Frequency sensing logic Input to the frequency sensing logic is obtained internally on the ATC from the voltage inputs A9-A12 and B1-B4. Like the voltage inputs, the frequency sensing logic will function at 120V, 60 Hz or 69V, 60 Hz. It detects both underfrequency and overfrequency conditions, with a range of 50 to 70 Hz. Both the over and under drop-out points have independent pick-up differentials within the range of the drop-out points. The pick-up and drop-out points (underfrequency and overfrequency) plus the differentials are selected for the specific applications; and once selected, cannot be changed.

The underfrequency drop-out point may be selected anywhere within the range of 50 Hz 59 Hz. The pick-up differential must then be selected at a point higher than the drop-out point and less than 61 Hz. For example: if the underfrequency drop-out point selected is 54 Hz, the pick-up differential selected must be between 54 Hz and 61 Hz.

The overfrequency drop-out may be selected anywhere in the range of 61-70 Hz. The pick-up differential must then be selected at a point less than the drop-out point and higher than the 59 Hz. For example, if the overfrequency drop-out point selected is 65 Hz, the pick-up differential selected must be 59 Hz and 64 hz.

An L.E.D. is supplied, which when lighted, indicates that the frequency is within the predetermined limits of both the over and underfrequency drop-out points.

When frequency sensing is not desired, this logic can be omitted and the ATC will assume normal frequency.

The frequency logic can perform two basic functions, selected for each source by programming switches PS-7 and PS-8, respectively.

1. "Prevent Closing Only" - With the mode selector switch 43 in the automatic position, either two-or three breaker operation specified, and one source normally deenergized (for example, an emergency generator), low voltage upon the normal source will cause a signal to be sent to start the generator. When the generator comes up to proper voltage but the frequency is not within the proper operating range as selected, the generator source main breaker will be prevented from automatically closing until the frequency has reached proper operating range.

2. "Automatic Transfer function" - With the mode selector switch 43 in automatic position, two-or three-breaker operation specified, and both sources or one source only normally energized, if the frequency on a source that is feeding a load falls or rises beyond the limits of the normal operating range and after a predetermined time delay (as selected on the off delay timer, described hereinafter) the main breaker on the faulted source will trip and a transfer operation to the alternate source, as programmed, will occur.

2.3 Manual breaker closing (inputs) Terminals A2 - Breaker 52-1 BlO - Breaker 52-2 C3 - Breaker 52-T These inputs provide for electrical closing of the breakers by means of a control switch, pushbutton, or other manually operated control device and are operative only with the mode selector switch 43 in the manual position. When 120V A.C. appears upon any of these terminals, the ATC will generate a 120V A.C. output signal at the corresponding CLOSE output A6, B7, or C5.

An L.E.D. is provided to indicate the logic signal being supplied to the output signal generating circuitry. The L.E.D. will be lighted when a "close breaker" logic signal is being supplied to the interface circuitry which generates the 120V "close" command for the breaker. However, there are manv times when the L.E.D. will be lit yet the breaker remains open. For example. if through a manual control switch or an autotransfer signal the ATC is being signalled to close the breaker. and due to a malfunction, the breaker does not close, the L.E.D. will be lit. indicating that the ATC logic is calling for a closing operation.

2.4 Mal1l(nl (,rcrrke, tripping (irlpurs) Terminals Al - Breaker 52-1 B9 - Breaker 52-2 Cl - Breaker 52-T These inputs provide for electrical tripping of the breakers by means of a control switch, pushbutton, or other manually operated control devices, and are operative only with the mode selector switch 43 in the manual position. When 120V A.C. appears on any of these terminals, the ATC will operate 120V A.C. output signal at the corresponding TRIP output terminal A7, B8, or C6. An L.E.D. is provided to indicate the logic signal supplied to the output circuitry which generates the 120V trip signal for the breaker tripping relay or trip coil. When the breaker is tripped, the L.E.D. will be lighted.Again, as described previously, it is possible for the L.E.D. to be lighted yet the breaker remains closed.

2.5 Aux. automatic transfer A5 - Source #1 to Source #2 B9 - Source #2 to Source #1 These inputs are provided in the event that an automatic transfer has to be initiated by means other than the ATC device's built-in voltage and frequency sensors, such as external relaying on a complex system.

A 120V A.C. signal to this input causes an immediate transfer (time delay is bypassed from one source to the other when the mode selector switch 43 is in the automatic mode and the other source is within normal limits. Once this signal is removed from the input, an immediate retransfer (time-delay is bypassed) will take place if: 1. The ATC device is programmed for automatic return to normal, and 2. The source is within the other limitations of proper voltage frequency.

2.6 Auxiliary lockout A3 - Breaker 52-1 B11 - Breaker 52-2 C4 - Breaker 52-T A 120V A.C. signal into this input can be from any external device that requires that the breaker be blocked from electrical closing. This input will not trip the breaker if it is closed.

It merely blocks electrical closing after the breaker is tripped. These lockout inputs are not voided by the selector switch 43 and will function in any mode.

2.7 Breaker status indicator A4 - Breaker 52-1 B12 - Breaker 52-2 C2 - Breaker 52-T These inputs form the ATC of the status (closed or tripped) of the associated breakers, information which is required for electronic interlocking and breaker status indication. The signal to the input is supplied from a normally closed (N.C.) breaker auxiliary switch.

2.8 Ground fault lockout C9 The signal to this input is generated by a normally open (N.O.) contact which is activated by a ground fault detection system. When energized, this input will prevent electrical closing of all breakers. If a breaker is already closed, this input will not trip the breaker.

Also, unlike Auxiliary Lockout, a trip signal is sent to all breakers that are open. This signal will trip the breaker if the breaker has been mechanically closed by the Manual Close button on the front of the breaker. This is to prevent any open breaker from being closed resulting in a fault.

Removing the signal from the input will not void the lockout; once the lockout is activated, it must be reset by input C8 (Latch Reset).

An L.E.D. is supplied to indicate that ground fault lockout has occurred.

2.9 Overcurrent lockout C10 signal to this input will be from an N.O. contact that is activated by an overcurrent tripping device associated with the breaker. When energized, this input will prevent closing of all breakers (If the breaker is closed, this will not trip the breaker). Also, unlike Auxiliary Lockout, a trip signal is sent to all breakers that are open, which signal will trip the breaker if it has been mechanically closed by the Manual Close button on the front of the breaker.

Removing the signal from the input will not void the lockout; once the lockout is activated it must be reset by input C8 (Latch Reset).

An L.E.D. is supplied to indicate that overcurrent lockout has occurred.

2.10 Latch reset C8 This input is used to reset the ATC logic acter a lockout has occurred from C9 or and the fault has been cleared.

The signal to the input will be from an N.O. pushbutton or an N.C. contact from an electric or hand reset relay that was used to energize C9 or C10.

Note: Signal to C9 or C10 must be removed before latch reset will function.

If for some reason all control voltage is lost, the latch will automatically reset.

2.11 Control power D1 - D2 Source #1 D4 - D3 Source #2 Input is 120V, 60 Hz power from the secondary of a control power transformer. The control power transformer primary is connected to phases A and C of each source.

2.12 Auto disable Cli The signal to this input is from a "Manual" (M) contact of the mode selector switch 43.

This input signals the logic that all functions that are performed in the automatic mode should now be voided, except for the interlocking and lockout.

2.13 Test input C12 The signal to this input is from a "Live Test" (LT) contact on the mode selector switch 43. This input signals the logic to perform all operations in the same manner as the automatic mode, except to disable the circuitry which generates the output signals to the breakers, thereby preventing the breakers from being tripped or closed by the ATC.

2.14 Close output A6 - Breaker 52-1 B7 - Breaker 52-2 C5 - Breaker 52-T When a signal is received from the ATC logic to electrically close a breaker, the output from these terminals is 120V, 60 Hz. It should be noted that output remains at 120V as long as a closing logic signal is present. (When in the automatic mode, the closing signal is not removed until a trip or lockout is called for.) When these outputs are energized, the L.E.D.'s (as described under Manual Breaker Closing) are lighted.

2.15 Trip output A7 - Breaker 52-1 B6 - Breaker 52-2 C6 - Breaker 52-T When a signal is received from the ATC logic to electrically trip a breaker, the output from these terminals is 12()V, 6() Hz. It should be noted that the output stays at 120V, as long as the tripping logic signal is present. When in the automatic mode, the tripping signal is not removed until a close is called for.

When these outputs are energized, the L.E.D.'s (as described under Manual Breaker Tripping) are lighted.

2.16 Control power output D5 This is the output from which control power is obtained for the equipment remote from the device (indicating lights, misc. relays, etc.). This output is under the influence of the control power transfer scheme, which is a part of the ATC. The output is 120V, 60 Hz.

2.17 Generator start A8 - Source #1 controls Gen #2 B5 - Source #2 controls Gen #1 These outputs are energized whenever their corresponding source voltage is within the normal limits. The outputs are connected to auxiliary relays which, under normal conditions, will be energized. If a source falls below normal limits and the ATC logic calls for an automatic transfer, the generator output will do one of the following: 1. If the voltage falls to less than 55% of rated voltage (control power threshold which is described in 2.18), the Generator Start output will be deenergized immediately, and the auxiliary relay will drop out, thus sending a signal starting the generator.

2. If programming switch (PS-6) is closed, the generator starting operation will be delayed. Otherwise, the operation is begun as soon as the voltage sensors call for a transfer.

a. With programming switch PS-6 set for no time delay, as soon as the voltage sensors ask for a transfer, the Generator Start output will drop out (even if control power is still available), deenergizing the auxiliary relay, thereby sending a signal to start the generator.

b. With programming switch set for time delay, when the voltage sensors ask for a transfer, the generator start output will be delayed 1/2 of the off delay timer setting before being deenergized provided sufficient control power is still available, i.e., > 55%).

The signal to shut down the generator is accomplished by reenergising the Generator Start output. The output is reenergised after the normal source has returned, a retransfer has occurred (if programmed for automatic return to normal), and the Generator Unloaded running timer has timed out. The Generator Unloaded running timer is adjustable from 15 sec. to 30 min. When the ATC is programmed for manual return to normal, the Generator unloaded running time begins to time out as soon as the mode selector switch 43 is placed in the manual position, and the tripped breaker is reclosed.

An L.E.D. is supplied for each Generator Start output. When the L.E.D. is lighted, this indicates that the Generator Start output is energized and is not calling for a generator start.

2.18 Control power selector switch - programming switch #1 (PS-1) This switch is to designate which power source is selected as the normal source of control power for the ATC itself. When programming switch PS-1 is open, source #1 is selected as the normal control power source. When switch PS-1 is closed, source #2 is designated as normal. The above statements apply only when both sources are at normal voltage.

The control power transfer logic will seek out the higher voltage source, regardless of the programming switch PS-1 setting, if the level of the designated source falls below the drop-out setting of its associated voltage sensor.

Example: Programming switch PS-1 set to select source #1 as normal control power supply source. If the voltage on source #1 falls below the drop-out setting of the #1 voltage sensor and the #2 voltage sensor shows normal voltage, the control power transfer logic will signal for a transfer to source #2. When the restored voltage on source #1 exceeds the pick-up level of its voltage sensor, a return to source #1 will occur, because the PS-1 setting designated source #1 as normal control power supply.

if both voltage sensors indicate voltages below their respective drop-out levels, the logic will then seek to select the source with the higher voltage level, provided that the source is higher than 55% of normal voltage.

The 55% criterion is chosen because a failure of a single phase results in a phase-to-phase voltage of about 57% of normal phase-to-phase voltage. Although this degree of failute would seriously affect the main load being supplied and requires that the load be switched to an alternate source, 57% of normal voltage is still satisfactory for operation of the ATC.

However, a voltage appreciably less than this would result in unreliable control action.

Therefore, 55cue of normal voltage is selected as the point at which a control power transfer should occur.

If no control power is available at an input because of a blown fuse or faulty control power transformer, regardless of the indication of its associated voltage sensor, the control logic (see 4.8) will select the other source provided that the source is higher than 55% of normal voltage.

If the voltage on both sources falls below 55% of normal, all control power will be disabled until one of the sources returns to a value greater than 55% of normal.

Two L.E.D.'s are supplied - one for source #1, and one for source #2. The one that is lighted indicates which source is supplying the control power.

2.19 Tie trip inhibit Programming Switch #2 (PS-2) This programming switch is to be used to select manual or automatic return to normal, on a 3-breaker system (2 main breakers and a tie breaker).

When the programming switch PS-2 is in the open position and a transfer operation has taken place (1 main breaker tripped and the tie breaker closed), and when the failed source returns to normal, and after a predetermined time delay, the tie breaker will trip and the main breaker reclose (automatic return).

When the programming switch PS-2 is in the closed position, a retransfer back to the restored source will not occur, and the tie breaker will remain closed. Retransfer back to the restored source can be accomplished in either of two ways: 1) If the failed source has returned to normal and failure occurs on the source to which the load has been transferred, then the main breaker on the failed source will trip, and the main breaker on the restored source will reclose (the tie breaker will remain closed during this operation).

2) After placing the mode selector switch 43 in the Manual position, the breakers involved can be tripped and closed using their respective manual control switches or pushbuttons.

2.20 Trip #2 if #1 is normal Trip #1 if #2 is normal Programming Switches #3 and #4 (PS-3, PS-4) These programming switches are to be used to select manual or automatic return to normal on a two-breaker system (2 main breakers and no tie breaker).

If both of these programming switches are left open, the first source energized will be selected as the normal source that feeds the load. If an automatic transfer operation takes place and the failed source then returns to normal. a retransfer back to the restored source will not take place as long as the source that is feeding the load remains at normal.

Retransfer back to the restored source will be performed in either of two situations: 1) The failed source has returned to normal and a failure occurs on the source to which the load has been transferred.

2) With the mode selector switch 43 in the Manual position and the breakers are tripped and closed using their respective manual control switches or pushbuttons.

PS-3, when closed, designates main breaker 52-1 and source #1 as the normal power source that feeds the load. When a transfer operation has occurred and transferred the load to source #2, a retransfer back to source #1 will occur as soon as source #1 returns to normal and the timers have timed out.

PS-4, when closed, performs the same function as PS-3, except main breaker 52-2 and source #2 is designated as the normal power source for the load.

Either PS-3 or PS-4 may be closed, or neither one; they may not both be closed. Note that PS-3 and PS-4 designate normal power source for the load, while PS-1 designates the normal source of power for the ATC device and its control functions.

2.21 Keep last source Programming Switch #5 (PS-5) This switch, when closed, inhibits automatic tripping of a main breaker if it receives a transfer signal from its source and the load has been previously transferred to this source.

This inhibition is removed when the source from which the load has been transferred returns to normal.

When this PS-5 is open and the load has been transferred to a source #2 due to a failure on source #1, and if source #2 (now feeding the load) has a failure, the main breaker #2 of second failed source #2 will see an automatic transfer signal and will trip even though there is no available source to transfer to. This will occur only if the voltage on the failed source #2 has dropped below the drop-out setting of the voltage sensor and is above 55%, thereby providing control power.

In either case (both main breakers tripped, or one tripped and one closed), if both sources are subnormal and one source returns to normal, the normal source breaker will close and the other main breaker, if closed, will trip regardless of how the system was programmed (manual or automatic return to normal).

2.22 Delay generator start Programming Switch #6 (PS-6) This programming switch, when closed, delays drop-out of the Generator Start output approximately 1/2 of the setting of the off-delay timer when control power is available (refer to Generator Start).

When PS-6 is open, the Generator Start output will drop out as soon as an automatic transfer signal is received.

2.23 Frequency function selector Programming Switch #7 (PS-7) - Source #1 Programming Switch #8 (PS-8) - Source #2 These programming switches are provided to select the function that is to be performed by the frequency sensors (as described under Frequency Sensing Logic).

2.24 3-Wire, 4-Wire Programming Switch #9 (PS-9) - Source #1 Programming Switch #10 (PS-10) - Source #2 These programming switches are provided to select the type of connection to be applied to the voltage sensors, 3-wire (phase conductors only) or 4-wire (phase conductors plus neutral), as described in Voltage and Phase Sensor Inputs 2.1.

2.25 120V, 69V Programming Switch #11 (PS-11) Programming Switch #12 (PS-12) These programming switches are provided to select the input voltage to the voltage sensors (as described under Voltage and Phase Sequencing Inputs).

2.26 Adjustable timers A total of six adjustable timers are furnished, three for source #1 and three for source #2.

1) On-delay timing is supplied for both sources to ensure that when a failed source returns to normal, the voltage is stabilized before a retransfer will occur. The timing range is adjustable from 2 seconds to 10 minutes.

2) Off-delay timing is supplied for both sources to ensure that momentary dips in voltage will not cause a transfer operation. The timing range is adjustable from 2 seconds to 10 minutes.

3) A Generator Unloaded running timer is provided for each source. These timers have a range of 15 seconds to 30 minutes.

Two L.E.D.'s are supplied, one for each set of on-and off-delay timers as described in 1) and 2) above. The L.E.D. will indicate when the timers are timing and which timer was last to operate.

L.E.D. Operation 1. When either the on-or off-delay timer is timing, the L.E.D. will be flashing.

2. If the on-delay timer was the last to operate, the L.E.D. will be continuously lighted.

3. If the off-delay timer was the last to operate, the L.E.D. will not be lighted.

3. SEQUENCE OF OPERATION: 3.1 3-Breaker system 3.1.1 Normal operation Under these conditions, both sources are at normal voltage and are feeding their respective loads. That is, both main breakers 52-1 and 52-2 are closed, and tie breaker 52-T is open.

3.1.2 Automatic mode 1) With a loss of voltage on one of the sources, the following will occur: Assuming a failure of source #1, the source #1 voltage sensors will generate a logic signal to start the off-delay timer. When the off-delay timer expires, the programmable logic will generate activating logic signals to the output signal generators causing breaker 52-1 to trip and breaker 52-T to close. The same operation occurs should source #2 have failed, except breaker 52-2 would trip after a time delay and the tie breaker (52-T) would close thereafter.

2) Should there be a simultaneous loss of voltage on both sources, the following will occur: a. If both source voltages fall below 55%, no control power will be available. Thus, both main breakers will remain closed and the tie breaker open.

b. If one (or both) of the sources is below the acceptable limits of the voltage sensors, but greater than 55%, control power will be available and the following will occur: (1) If programming switch PS-5 (Keep Last Source) is open, both main breakers will trip after their predetermined time delay. If one main breaker trips before the other due to a shorter delay, the tie breaker will close, which is acceptable at this point. This would almost surely be the case since to set 2 timers (2 seconds - 10 minutes) at the exact same time would be nearly impossible. Whichever source first returns to normal will cause the corresponding main breaker to close, followed by the tie breaker (if not already closed).

(2) If programming switch PS-5 (Keep Last Source) is closed, the first source for which the off-delay time has expired will experience a main breaker trip. Once that main breaker trips it will be followed by tie breaker closure. The other main breaker is prevented from tripping (even though the corresponding off-delay timer has expired). If the first source then returns to normal after a predetermined time delay (on-delay) the main breaker on the low source will trip, followed by closing of the main on the returned source (tie breaker remaining closed).

3) Should there be a loss of voltage at one source and abnormal voltage at the other, a transfer as described in (1) above would have already occurred. Therefore, the following sequence is also true should voltage be lost on the source to which the load has been transferred: a. When the normal source fails and neither of the sources is above 55%, no control power will be available. Thus, there will be no change in breaker status (one main breaker and tie breaker closed, other main breaker open).

b. When the normal source fails and one or both of the sources are above 55%, control power will be available and the following will occur: (1) If programming switch PS-5 (Keep Last Source) is open. after the predetermined time delay. the main breaker of the source that was serving the load will trip resulting in a condition of both main breakers tripped and tie breaker closed.

Whichever source returns to normal first, after a predetermined time delay (on-delay) its main breaker will close, thus leaving the condition of one main breaker and the tie breaker closed (tie breaker had never been tripped) and the main breaker open.

(2) If programming switch PS-5 (Keep Last Source) is closed, the main breaker that is feeding the load will be blocked from tripping. One main breaker and the tie is now closed, with one main breaker open and both sources at subnormal voltage.

If normal voltage is restored to the source that was last feeding the load, there will be no change in breaker status. If voltage is restored to the source from which the load was originally transferred after a predetermined time delay (on-delay), the main breaker on the subnormal source will trip, followed by closing of the main on the restored source which yields the condition of normal source main breaker and tie breaker closed (tie breaker had never been tripped) and subnormal main breaker tripped.

4) Return to normal after a transfrr operation can be accomplished in one of two ways.

a. When programming switch PS-2 (Tie Trip Inhibit) is in the open position and voltage on the source from which the load had been transferred returns to normal after a predetermined time delay (on-delay). the tie breaker will be tripped followed by reclosing of the restored source's main breaker. (Automatic return to normal).

b. When programming switch PS-2 (Tie Trip Inhibit) is in the closed position and the voltage on the source from which the load had been transferred returns to normal, no retransfer will occur.

The mode selector switch 43 must be placed in the manual position and the tie breaker then tripped and the main breaker reclosed by means of their respective manual control switches or pushbuttons.

3.1.3 Manual mode With the mode selector switch 43 in the manual position, control of the breakers is placed in the hands of the operator. Breakers may be closed and tripped (as governed by interlocking and lockout) by means of their respective manual control switches or pushbuttons.

3.1.4 Live test mode The purpose of the live test mode is to test the operation of the ATC without changing the status of the breakers. This is accomplished through the breaker status indicating L.E.D.'s as described in 2.3 and 2.4.

1) There are two test pushbuttons provided, one for each source, connected to terminals A9 and B4 to simulate loss of incoming voltage to the source. With the mode selector switch 43 in the "test" position and one of the pushbuttons depressed and held, one of the phase indicating L.E.D.'s and the CLOSE L.E.D. of the main breaker will go out.

After the off-delay timer has timed out, the main breaker TRIP L.E.D. will begin flashing, followed by the tie breaker CLOSE L.E.D. which will also begin flashing. These flashing L.E.D.'s indicate the operation that would have occurred had there been a voltage failure on the source (main breaker TRIP L.E.D. flashing to indicate a logic signal calling for a trip and tie breaker CLOSE L.E.D. flashing to indicate a logic signal calling for a close). When the pushbutton is released and the on-delay timer has timed out, the L.E.D. will revert back to the actual status of the system.

It should be noted that during the entire sequence described above, all operations that the ATC performs to initiate an automatic transfer are tested (voltage sensing, timing, interlocking, etc.) except that in the live test mode the inputs to the final output triacs (normally used to generate 120V signals to the breakers) are shorted, thereby preventing the breakers from closing and tripping. Only the tie breaker tripping output is not disabled during this operation. This is to maintain a positive interlock in the event the mode selector switch 43 is left unattended in the live test position and unauthorized personnel try to manually close the tie breaker, causing two sources to be simultaneously connected to the system. As a result of this interlock, the tie breaker TRIP L.E.D. will remain lighted during the test operation.

3.1.5 Interlocking The breakers are electronically interlocked to prevent all three from being closed at the same time, thereby paralleling the two sources. The interlock is operative regardless of the position of the mode selector switch.

3.2 Sequence of operation Two-Breaker System No modification of the ATC is required to change from a three-breaker system to a two-breaker system. The breaker status inputs are from N.C. breaker auxiliary contacts (contacts having a status opposite that of the main contacts). Thus, on a two-breaker system there will be no input for a tie breaker and the ATC will interpret this as a tie breaker being closed. Therefore, only the two main breakers will react to the ATC's signals.

3.2.1 Automatic mode 1) Assume source #1 and breaker 52-1 is the normal source and source #2 and breaker 52-2 is a generator source.

a. Upon voltage failure of source #1 (but source #1 still has sufficient voltage to hold in control power, i.e., greater than 55%) a signal is sent to start source #2 generator (signal is instantaneous or time delayed depending on selected setting of programming switch PS-6, Delay Generator Start). After the off-delay time has expired, breaker 52-1 will trip. As soon as the generator is up to proper voltage and frequency and the on-delay timer has expired, breaker 52-2 will close.

b. Should the same condition occur but source #1 does not have sufficient voltage to hold in control power, the generator will receive an instantaneous start signal. The off-delay timer has enough capacitance to continue timing during the period of no control power (approximately 10 seconds between loss of voltage and the time for the generator to come up to 55% of rated voltage). After the off-delay timer has expired and generator control power is available, breaker 52-1 will trip. After generator has reached proper voltage and frequency and the on-delay timer has expired. breaker 52-2 will close.

2) For a return to normal after a transfer operation refer to Section 2.20. After the normal breaker has reclosed, the generator output will continue to call for the generator to run unloaded for a predetermined amount of time (as selected on the unloaded running timer, adjustable 15 seconds to 30 minutes).

3.2.2 Manual mode 1) Same as 3-breaker operation, see Section 3.1.

3.2.3 interlocking Breakers are interlocked to prevent both from being closed at the same time and paralleling the two sources. The interlock is operative regardless of the position of the mode selector switch 43.

3.2.4 Lockout Same as three-breaker operation.

4. Circuit description: Unless otherwise stated, the ATC device contains two of each circuit, one for each source, and the description will refer to the source #1 circuit. Items in parentheses refer to the corresponding item reference for source #2.

4.1 Power supply The Power Supply circuit. Figure 4, contains isolated bidirectional thyristor (triac) switches for control power transfer and partially redundant low voltage DC supplies. Figure 4 shows the entire power supply circuitry for both sources. The secondaries of the two control power transformers arc connected between terminals D1 and D2 and between terminals D4 and D3. Terminal D5 carries the switched control power of 120 volts AC, nominal, with respect to ground terminals D2-D3. The power inputs are protected against high voltage transients by metal oxide varistors D47, D48. The Control Logic circuit (Figure 11) determines which transformer is to be the source of control power and causes current to flow into either terminal CO42 for source #1 or C,3 for source #2.Current into C,42 turns on optically coupled thyristor isolator A4. The thyristor of A4 short circuits diode bridge DB4 to provide AC gate current for triac Q42 from its snubber network R41, C43 and C44. The snubber limits the voltage across the thyristor of isolator A4 to less than half that across triac Q42 in addition to providing dv/dt protection for both thyristors A4 and Q42.

Transformers T41 and T42 for low voltage DC supplies are also connected to the control power inputs. The center tapped transformer T41 and diode bridge CB4 provide positive and negative supplies smoothed by capacitors C47 and C49, respectively. A redundant supply is associated with T42 consisting of bridge EB4 and capacitors C48 and C41(). Both unregulated negative supplies are connected at Ci8 and CjlO to Control Logic inputs in order to sense the presence of control voltage from the transformers T41 and T42. Diodes D43 through D46 allow the greater magnitude DC voltages to supply the positive and negative regulators. The positive regulator which only supplies low current to the two Voltage Sensor circuits is simply Zener diode D41. The negative regulator is a serics regulator using transistor Q41 and Zencr diode D42 as a reference.The negative supply powers all the ATC logic circuitry with a V55 (logic (ì) of -12.4 volts. For each of the logic circuits a separate diode and capacitor establishcs Vt (logic 1), a diode voltage drop below ground. High current loads sink current directly from ground to V55 so that a logic supply Vt to V55 is maintained during short power outages.

4.2 Voltage sejisor The Voltage Sensor circuits contain logic for independently measuring each of the three phase voltages. checking the phase sequence. and monitoring the phase-to-phase voltage that powers the control power transformer. Two identical voltage sensor circuits are provided, one for each source. The voltage sensing circuitry is described more completely in U.K. Application 28275/77 Serial No. 1,555.6)2.

The Voltage Sensors, one of which is shown in Figure 5, use + 12 volts for operational amplifiers. but most circuitry uses -12 volts to ground. The secondaries of the input potential transformers are referenced to ground, and voltage magnitude measurements are negative with respect to ground. Figure 5 shows the Voltage Sensor circuit configured for three-wire operation and connected to an open-delta potential transformer. Connections to a four-wire Y-secondary potential transformer are shown in broken lines.

The reference voltage is selected by switch PS-11 (PS-12) 5.1 volts or 8.0 volts for rated AC inputs of 60 or 120 volts, respectively. The DROP OUT potentiometer R577 determines the threshold voltage for the three input comparators, corresponding to 65% 90% of rated input voltage, if the sensor output indicates normal voltages on the bus.

Transistor Q52 disables the PICK UP potentiometer R578 by raising it to ground potential and reverse biasing diode D514.

If switch PS-9 (PS-10) is in the 4 WIRE position, each of the phase-to-neutral voltages feeds identical circuits. The phase A voltage of the potential transformer secondary connected to terminal Va37 is divided by resistors R570 and R556, with diode D55 clamping during the positive half cycle. If the negative peak exceeds the magnitude of the threshold voltage, comparator output 5A2 goes high to trigger monostable multivibrator 5B. Output 5B6 goes high blocking diode D58 and output SB7 goes low, turning on A NORMAL light-emitting diode D519. The 44 millisecond pulse width of the retriggerable monostable multivibrator 5B requires that two successive line cycles fall below the selected threshold for a low voltage indication.If any of the phase voltages (or the phase sequence) is abnormal, comparator input 5E6 is pulled below its reference input 5E7 by diodes DS8, D59, D510 (or Do17). The VOLTAGE NORMAL, V1, output at terminal V014 goes low and its complement at terminal V012 goes high to signal abnormal bus voltage. Transistor Q51 turns on to disable the DROP OUT potentiometer R577. This causes the comparator threshold voltage at 5A5, 5A9, and 5All to be raised (an increased negative magnitude) to that determined by the PICK UP potentiometer R578, corresponding to an input of 90% to 98% rated voltage.

Phase A and C potential transformers are also connected to voltage dividers consisting of resistors R575 and R562 or RS76 and RS60, respectively. A signal proportional to the phase-to-phase voltage Vc(t) is present at operational amplifier output Sol2. In a 3 WIRE system the two open-delta potential transformers provide Vab(t) and VCh(t) to the phase A and C voltage sensors at VA37 and Via33, respectively. The operational amplifier-generated value proportional to Vca(t) is provided to the third sensor at 5A8 via resistor R551 and switch PS-9A (PS-1OA).

The Vca(t) signal has three other uses. Switch PS9B selects resistor Ras61 or RS52 to connect Vca(t) to the comparator input SE8 in a circuit similar to the three above. In this case monostable multivibrator output SD6 drives terminal V020 high if phase-to-phase voltage Vca powering the control power transformers is above 55% of rated (P1 = 1). The 55% threshold DC voltage is derived from resistors R563 and RS67 in the reference circuit.

The Vca(t) signal is rectified and smoothed by diode DS18 and capacitor CS10 to feed comparator input SA6. An identical circuit on the second Voltage Sensor circuit is cross-coupled via external connection, with comparator negative input of Voltage Sensor Circuit #1 connected to comparator positive input of Voltage Sensor circuit #2 and conversely. These comparators determine which of the two control power sources is greater in magnitude. Comparator output SAl of Voltage Sensor #1 drives terminal V1,4 high if Vca of #1 is greater (P1 > P2 = 1). The double hysteresis effect of the feedback resistors RS36 in each comparator ensures that a previously lower source must exceed the selected control power source by several volts before causing a control power transfer.

The phase sequence checking also uses the Vc(t) signal with a 30 lag due to resistor RS66 and capacitor CS3. In 4 WIRE systems of proper sequence switch PS-9C (PS-lOC) connects a Vc(t) signal to operational amplifier input SC7 equal in magnitude and phase with the V,,(t-30") signal at amplifier input 5C6. In 3 WIRE systems switch PS9C connects Vcb(t) via a 30 lead network (resistor RS73, RS74, RS68 in parallel with R569 and capacitor Cos1). With proper sequence the Vcb(t+30 ) signal is equal in magnitude and phase with the Vca(t-30 ) signal.

Figure 6 shows a phasor diagram of the sequence circuit operation. It can be seen that with normal sequence on a 4-wire system the phase angle of phase-to-ground voltage Vc (90 ) is equal to the phase angle of phase-to-phase voltage Vco (120 ) shifted 30 in a lagging direction. Similarly, with normal sequence on a 3-wire system the angle of voltage Vcb (600) shifted 30 in a leading direction is equal to the angle of voltage Vco (120") shifted in a lagging direction. Resistors R574, RS73, Ras68. and R566 are chosen to provide proper proportionality constants to make the equations of Figure 6 hold true. Thus, in either 3 or 4 wire positions, the operational amplifier 5C10 output voltage is negligible and comparator positive input SEll is near ground potential due to resistor R528. Comparator output SE13 is high, blocking diode DS17 and lighting SEQUENCE CORRECT light-emitting diode DS22 via transistor Q53. For either 3 or 4 wire, reverse sequence is equivalent to 1800 phase reversal of Vcn phasor. Thus, the large voltage present at the operational amplifier output due to out-of-phase inputs is rectified and smoothed by diode D515 and capacitor C59.

Positive input SEll is driven below the -8 volt reference input and output 5E13 goes low.

Transistor Q53 and L.E.D. D522 are held off. Diode D517 pulls comparator input 5E6 low to indicate an abnormal source at the voltage sensor output To14.

4.3 Frequency sensor The over/under frequency measuring circuit is designed to digitally determine if an input voltage is between present frequency limits. The frequency sensor is described more completcly in U.S. Patent Specification No. 4090090. The circuit, Figure 7, tests the incoming signal during one cycle to see that it is above a lower frequency limit and on the next cycle tests the input to see that it is below an upper limit. The process continues on alternate cycles unless one of the limits has been exceeded.

If the lower frequency limit is passed, the circuit is programmed to test the incoming signal and compare it to a preset return frequency higher than the trip point. In other words, the input signal frequency is required to return to a frequency that is higher, say 2 Hz typically, than the dropout condition before the fault indication is cleared. A similar procedure occurs when the upper frequency limit is passed, except that the return point is set typically 2 Hz lower than the trip point. The four values, that is, the overfrequency and underfrequency trip values along with the two return values, are stored as eight bit binary numbers in a read-only memory, integrated circuit 7D.

The read-only memory (ROM) 7D requires a 5V DC power supply at relatively high current. Thus, the frequency sensor logic operates on a VOD to Vss supply of SV DC established by Zener diode D72. To conserve current the ROM is turned on only briefly just before a half cycle measurement period. The four comparators of 7A use the 12V DC supply Vcc to V55 at input and output.

Assume underfrequency testing is called for by a logic 1 on pin 1 of flip-flop 7J. If no alarm condition had been sensed before, the ROM is addressed with logic O's on pins 7D13 and 7D14. If the input voltage (60 or 120 volts nominal) is in the negative half cycle, input sensing pins 8 and 11 of the 7A comparator are more negative than the reference voltage established by resistors R77 and R79. Thus. the memory power supply switch Q71 is off as 7A13 is low, and the clock oscillator 7C is held off via inverter output 7B6 and 7A14 is high.

At the positive zero crossing of the line, 7A13 goes high, turning on Q71 to energize the memory 7D. Inverter output 7B15 resets counter 7H and loads latches 7F and 7G with the binary representation of the underfrequency trip level stored in the ROM. The input signal at 7A8 lags that at 7A11 due to capacitor C72. This allows the just-mentioned initializing by 7A13 before 7A14 goes low to start a measurement.

When 7A14 goes low at the delayed zero crossing, 7A13 is pulled low through diode D73 removing the reset on counter 7H, latching 7F and 7G and turning off Q71. Capacitor C73 maintains power to memory 7D during the latching of 7F and 7G. The clock oscillator 7C runs while 7A14 is low. At the delayed negative zero crossing, 7A14 goes high to shut off the clock and to toggle flip-flop 75. The number of clock pulses counted by the 8-bit counter 7H represents the period of the input line voltage. This is compared with the 8-bit binary representation of the underfrequency trip level period from latches 7F and 7G.The underfrequency output 7M12 of the 8-bit magnitude comparator consisting of 7E and 7M is high if the period counted is greater than the trip level period stored in the ROM (Trip" > T" trip implies finpiii < ft trip) The state of output 7M12 is latched by flip-flop 7L at the end of the measurement half cycle when flip-flop output 752 is toggled to a logic 1. The output circuit translates the state of latch 7L to the 12 volt logic level used by the other logic modules. If the frequency is within normal limits. the output of the sensor is high and a light-emitting diode D71 is on.

The toggling of flip-flop 75 addresses the overfrequency trip level in the memory 7D for the next positive half cycle. When a limit is exceeded, the ROM addressing is modified by feeding back the fault condition stored on latch 7L. The NAND gates 7K select the return condition during its appropriate cycle whle the other normal limit is examined during its alternate cycle.

4.4 ROM prog1.aJ?ztii?ig procedttre Four locations of the 32 locations available in the PROM are utilized in this circuit. The information stored and the particular addresses used are summarized in the following table.

Location Stored Data 7 Underfrequency Trip Point 15 Underfrequency Alarm Reset 23 Overfrequency Trip Point 31 Overfrequency Alarm Reset For example, assume that the underfrequency trip is desired to occur if the input frequency should go below 58 Hz, and it should not reset the alarm until the input had returned to a frequency of 60 Hz. Similarly, assume the overfrequency trip to be set at 62 Hz with return at 60 Hz also. Since the circuit is set up to divide a half cycle of 60 Hz inputs into 130 parts, this sets the binary number required for locations 15 and 31 in the ROM at 1301í, or 100000102. The under and overfrequency trip points are calculated according to the following equation:

where frequency is the upper or lower frequency limit in Hz.In actual practice, the number arrived at for count will not be an integer and should be rounded to the closest integer number.

Using the above equation, the limits arrived at for 58 Hz and 62 Hz are as follows: count [62] = 126.oil = ÛIlllllÜ2 and count [58] = 134.48 = 1341(ì = 100001102 These numbers are then programmed into the ROM at locations 31 and 7, respectively.

4.5 Main breaker logic Two identical Main Breaker Logic Circuits are provided, one of which is shown in Figure 8. Each circuit contains bidirection thyristor (triac) switches for the shunt tripping (QX4) and closing (Q83) of the corresponding main breaker and another for auxiliary generator engine starting (Q85). These triacs remain gated on after breaker operation for as long as the condition initiating turn on remains.

There are four modes of shunt tripping: manual, interlock to prevent paralleling sources, lockout from a faulted source, and automatic transfer. The manual trip input Mj41 directly causes a trip upon receipt of a logic 0 signal from its associated AC interface circuit. When the interlock input Mjl9 from the Control Logic circuit goes low, breaker closure is immediately inhibited; and after an approximately 2() msec delay from R814/C84, the trip output is activated. The ground fault or overcurrent lockout input Mj29 also inhibits closure when low; and if the breaker is open (such as by a ground fault or overcurrent trip), the trip triac Q84 will be energized to override a mechanical closure until the lockout latch is reset.

The automatic transfer logic has three trip request inputs and two inhibiting conditions. A logic 0 input from the off-delay timer at My33, from the auxiliary transfer interface circuit at Mi27, or from the retransfer to normal source logic at Mj31 calls for an automatic trip (M,,7 goes high). Input M131 is driven from the other Main Logic circuit's output which causes return to the designated normal source &num;2 of a two-breaker system when its on-dclay has timed out. The automatic transfer by any of the three inputs is inhibited if automatic enable is off (M115 = O) or if the Keep Last Source switch PS-S is closed and the other main breaker shows an automatic trip (my37 . Mj39 = 1).Mi37 of one circuit is cross-coupled to the other circuit's automatic trip output M,,7. The automatic transfer output M"13 goes to the Tie Logic circuit requesting a tie breaker closure to complete the three-brcaker transfer.

There are two modes of closing a main breaker: manual and automatic. Each has several inhibiting conditions. For a manual CLOSE attempt the output of the associated AC interface circuit drives Mi23 low. In the automatic mode (milt high) a closure is attempted if the normal voltage on delay has timed out (Mill is high) and the frequency sensor indicates normal (Mi9 high). The closure is inhibited if there is a trip output present a source paralleling interlock (M,l low), an auxiliary lockout (my25 low), or a latched lockout from ground fault or overcurrent (Mi29 low). The automatic transfer signal Me,13 provides a redundant inhibit of closure at pin Ii of XF during transfer conditions.

In the test mode (my21 = 0) the gates of the trip and close triacs are short-circuited by saturated PNP transistors 081 and 082. Thus, the triacs are held off. and no breaker transfer operation occurs while testing the system. The trip triac is allowed to operate, however, for an interlock or lockout trip. A logic 0 applied to pin 13 or pin 11, respectively, of 8E turns on 082 to allow the breaker to trip. Also in the test mode the automatic enable Mjl5 is pulsed by the Control Logic circuit to flash the trip or close L.E.D. in the simulated automatic operation.

4.6 Delay timer The three independently adjustable timers: on-delay, off-delay, and generator shutdown, utilize a common 14 stage digital counter. This is device 9H on Figure 9. The oscillator associated with a particular timer is gated on during its timing interval. If either input from the Voltage Sensor Di5 or the Frequency Sensor Dj9 shows an abnormal condition logic 0), the off-delay oscillator is gated on at 9E12. The transition to off-delay timing causes a counter reset pulse at EXCLUSIVE - OR output 9F11 via R93/C91. The on-delay output latch NAND 9C is reset and disabled which allows the timing status L.E.D. D91 to go off and removes the set signal at pin 9A6 of the generator shutdown latch.If programming switch PS-6, Delay Generator Start, is open or if the generator is already the source of control power (Djl5 low), the latch is reset. Otherwise NAND output 9A10 must decode 21' off-delay oscillator periods before the latch is reset which delays the generator by one-half of the off-delay time. After 2l2 oscillator periods (2 seconds to 10 minutes depending on the setting of potentiometer R914 pin 9A11 goes low to turn off the oscillator and drive the off-delay output Do,41 low. During timing the status L.E.D. flashes at a rate of f,,ff + 64 in response to counter stage six, pin 9H4. At off-delay time out 9H4 stays low and the L.E.D. is held off.

On-delay timing commences when both frequency and voltage inputs become normal.

The transition to normal resets the counter via 9F11. The off-delay and generator start decoders are disabled, the on-delay oscillator and latch are enabled. During timing the L.E.D. flashes at fon +64 similar to above. After 2l2 on-delay oscillator periods (2 seconds to l0 minutes depending on R913) NAND output 9C3 sets the on-delay latch. Pin 9C10 goes low to turn off the oscillator, drive the on-delay output Duo26 high, and hold the timing status L.E.D. on continuously.

When the on-delay latch is set at time out, a logic 0 on 9G1 enables the generator shutdown decoder and the logic 1 on pin 9B3 enables the generator oscillator. The oscillator is helf off until the position circuit Di31 senses that the normal source breaker has closed in response to the on-delav time out signal. At this time the counter 9H reads 2l2 or 010 . 0.

It requires 2l2 + 121 periods of the generator oscillator (15 seconds to 30 minutes depending on R915) to reach the turnover to all zeroes at which time 9G9 goes high. This causes output D,,24 to sink current and turn on a triac on the Main Logic circuit for generator shutdown. Thus. a maximum generator unloaded cool-down time three times longer than the maximum on/off delay time is possible using the same value capacitors and potentiometers in the oscillators.

4. 7 Tie breaker logic The Tie Logic circuit. Figure 10. controls the shunt tripping and closing of the tie breaker in three breaker transfer schemes. It may be deleted in two breaker schemes.

There are four modes of shunt tripping: manual. interlock to prevent paralleling sources, lockout from a faulted bus, and automatic retransfer. The manual trip input T121 directly causes a trip on a logic () signal from its associated AC interface circuit. When the interlock trip input Tri23 from the Control Logic circuit goes low. breaker closure is immediately inhibited: and after approximately 2() msec delay from R1()1()/Cl()3, the TRIP output triac 0104 is activated.The ground fault or overcurrent lockout input T133 also inhibits closure when low: and if the breaker is open (possibly a ground fault or overcurrent trip), the TRIP triac Ql()4 will be energised to override a mcchanical closure until the lockout latch is reset.

The automatic retransfer occurs if both on-delav timers indicate that the sources are normal (Tjl5 and Tjl7 = 1) and no automatic transfer closures are requested (Tj9 and Ti 1.1 1).

The retransfer is inhibited if the automatic enable is off (T,19 = O) or if the "tie trip inhibit" programming switch PS-2 is closed (Tj2'3 = 1).

In addition to the tie breaker closure to complete an automatic transfer (T,C) or T,11 low), a manual CLOSE via an interface circuit is possible (Tjl3 low ). Any closure is inhibited if there is a trip output present. a source paralleling interlock (T,23 low). an auxiliary lockout (Ti31 low), or a latched lockout from ground fault or overcurrent (T,33 low).

In the test mode (T,25 = ()) the gates of the TRIP and CLOSE triacs 0104 and Ol(J3 are short-circuited by saturated PNP transistors Q1()1 and Ql()2. respectively. No breaker transfer operation occurs while testing the system. The TRIP triac Ql()4 is allowed to operate. however, for an interlock or lockout trip. A logic 0 applied to pin 2 or pin 1, respectively. of lt)E turns off Ql()2 to allow the breaker to trip. Also in the live test mode, the automatic enable T119 is pulsed by the Control Logic circuit to flash the TRIP or CLOSE L.E.D.'s D102 or D103 in the simulated automatic operation.

t.8 Control logic The Control Logic circuit, Figure 11, contains the control power transfer logic, the interlock circuits, and the lockout latches. The control power transfer is based on inputs from the Voltage Sensor circuits indicating source voltage normal (V1 at Cj4, V2 at Cm17) or source voltage above 55% (P1 at Cj7, P2 at Cm13) and source &num;1 greater than source &num;;2 (P1 > P2 at Cull). Inputs from the unregulated DC supplies (S1 at Cj8, S2 at Cm 10) are proportional to the control power transformer voltage and override the voltage sensor signals if no control power is present because of a blown fuse or a faulty transformer. There are three conditions for which control power transformer &num;1 is elected as source of control power.

1) Source &num;1 and control power &num;1 voltages are normal and either programming switch PS-1 is open designating &num;1 as normal source or source &num;2 voltage is abnormal.

2) Source &num;2 voltage is abnormal, and source &num;1 voltage is greater than 55%, and source &num;1 voltage is greater than source &num;2, and control power &num;1 voltage is adequate.

3) Control power &num;2 voltage is off (blown fuse, etc.) and source &num;1 voltage is greater than 55%.

Source &num;1 if [Vi Si (PS1 + V2)] + [V2 Pi (P1 > P2) S1] + [S2 P1] = CPi When any of these conditions becomes true, capacitor C111 is rapidly discharged by NAND 11F3 through D1111 to turn off transistor Q112 and the triac Q43 (Figure 4) for control power source &num;2. Capacitor C112 is charged to a logic 1 by NAND 11G3 through R119 in not less than one-half cycle of the line to allow commutation of source &num;2 triac Q43 before transistor Q111 turns on to fire source &num;1 triac Q43 (Figure 4).For condition 3 the unregulated DC supply connected to C110 becomes less negative than V55 upon the failure of its associated control power source. Transistor Q114 turns on and overrides the source &num;2 normal signal. For control power transfer purposes V2 = 0. Similarly NOR 11C13, then inverter llA10, goes to logic 1 with resistor R1120 providing positive feedback. This enables NAND llE10 to cause a turn-on of source &num;1 triac if source &num;1 voltage is above 55%, P1 = 1.

The three conditions for which control power transformer &num;2 is elected as source of control power are similar to above.

1) Source &num;2 and control power &num;2 voltages are normal and either programming switch PS-1 is closed designating &num;2 as normal source or source &num;1 voltage is abnormal.

2) Source &num;1 voltage is abnormal and source &num;2 voltage is greater than 55% and source &num;2 voltage greater than source &num;1 and control power &num;2 is adequate.

3) Control power &num;1 voltage is off, blown fuse, etc., and source &num;2 voltage is greater than 55% and control power &num;2 voltage is adequate.

Source &num;2 if [V2 S2 (PS1 + Vl)J + [Vt P2 (Pi > P2) S2] + S1 P2 S2] = CP2 If the control power is on either CPi or CP2 is low and NAND output 11G11 enables the interlock circuit NAND 11B. A low output to a Main or Tie Logic circuit causes an interlock trip of the associated breaker if the other two breakers are closed. The inputs Cm27, Ci25, and Ci23 of 11B are driven by AC interface circuits using 120 volt control power to sense the status of a normally closed auxiliary contact of the tie breaker, main breaker &num;1, and main breaker &num;2, respectively.With the breaker main contacts open, the AC interface is energized and a logic 0 is fed to the inputs of the interlock NAND 11B.

Ground fault Ci36 and overcurrent Ci38 lockout inputs set the latches of 1 ID on a logic 0 from interface circuits. The high output from a set latch drives C,,40 low via NOR llC10 and drives a buffer inverter to light the ground fault or overcurrent L.E.D.'s D1113 or D1114. The lockout reset AC input C.35 is similar to the AC interface circuit but has a longer time constant R116/R115 to ensure a reset condition on power-up.

The automatic enable output Co9 goes low to disable automatic operation on a low input from the interface circuit connected to the MANUAL terminal of the mode selector switch Ci31 or is pulsed low by the oscillator consisting of resistor R1111. capacitor C113. and a half of NOR IIC. The oscillator is gated on by a low input Ci41 from the live test mode interface circuit. This pulsed enable signal causes the TRIP and CLOSE L.E.D.'s of the Main and Tie circuits to flash when the system is in the live test mode.

4.9 A C interface circuits All connections to remote switches or breaker auxiliary contacts are made through interface circuits operating on the 120V AC control power. The description refers to the first circuit in Figure 12. When AC input liS is not energized, capacitor C121 is charged through resistor R121 to a logical 1. Hysteresis is provided by R121 and R1228. Output Io4 is low, and Icil3 is high.

When 12()V, AC control power is applied to IS with respect to ground, C1210 charges negatively through diode D1210. Voltage divider R1237 and R1219 pulls C121 down to logic 0. Diode D121 clamps the signal at V55. Output 1(4 goes high, and output lo 13 goes low. Resistor 1210 provides sufficient loading to prevent pilot contact leakage from appearing as a closed contact. A delay in output switching of greater than 50 milliseconds is seen when the AC input is removed.

5. Mechanical As seen in Figure 13 the complete Automatic Power Transfer Control 12 consists of a power supply circuit board 102, a rack 104 holding twelve plug-in printed circuit modules 106, four barrier terminal strips 108 (only two of which are shown), a programming switch array (not shown), and the interconnecting wiring. Two of the modules, the Tie breaker Logic and the Control Logic, are used singly. The Frequency Sensor, Voltage Sensor, Main Breaker Logic, Delay Timer, and the AC Interface Circuit modules are used in pairs, one associated with each of the main circuit breaker. Figure 13 shows the ATC with the full complement of modules. The faceplate lenses with descriptive text are back-lighted by previously described light-emitting diodes to indicate the operating state of the ATC.For two-breaker transfer schemes, the Tie Breaker Logic module is simply omitted or replaced by a dummy module for front panel appearance. One or both Frequency Sensor modules may be similarly omitted. The less likely omission of other modules requires that the logic outputs of the omitted module be replaced by jumpers on the backplane wiring or on a dummy module.

6. Summary With the versatility offered by programming switches, auxiliary inputs. and a wide range of frequency, voltage, and time delay settings, the Automatic Transfer Control is useful in a wide variety of transfer schemes. Sales personnel can lead customers and their consulting engineers through the "design" of transfer schemes by selection of the various options available. More accurate estimates of the cost of transfer schemes are possible, especially in the complex transfer schemes. and considerable savings in engineering, drafting, and wiring costs are obtained.

Specifically, by providing programmable electronic digital logic means the invention provides a single device applicable to a wide variety of transfer strategies while using a minimum of power. Two- and three-breaker schemes are easily implemented since breaker status information is sensed from auxiliary contacts having a status opposite that of the main contacts. A plurality of timing functions are economically provided through the use of a plurality of oscillators cooperating with a single digital counter. The use of 120V AC Interface circuitry provides high noise immunity while simplifying installation. Additional flexibility is provided through the use of separate voltage sensors to determine which source to draw upon for control power and by employing a control power criterion of 55% of rated normal voltage.The provision for auxiliary transfer lockout. overcurrent lockout. ground fault lockout, automatic or manual return to either source. a "Keep Last Source" mode, and a live test mode in the present invention combine to provide a significant increase in performance and versatility over prior art automatic transfer control devices in an efficient and economic manner.

WHAT WE CLAIM IS: I. Automatic power transfer control apparatus for selectively energizing an electrical distribution network from a pair of electrical power sources through associated circuit interrupters, comprising: first source sensing means for sensing electrical parameters of one of said electrical power sources: second source sensing means for sensing electrical parameters of the other of said electrical power sources; a plurality of means for generating output control signals for said associated circuit interrupters to selectively connect and disconnect said electrical power sources to said distribution network. characterized in that the apparatus includes digital logic means for activating said output control signal generating means in response to changes in electrical parameters of said sources detected by said sensing means and means for programming said logic means to automatically command said output control signal generating means to selectively produce any of a predetermined set of output signal combinations in response to a predetermined set of electrical parameters of slid electrical power sources.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (20)

1. **WARNING** start of CLMS field may overlap end of DESC **.

   4.9 A C interface circuits All connections to remote switches or breaker auxiliary contacts are made through interface circuits operating on the 120V AC control power. The description refers to the first circuit in Figure 12. When AC input liS is not energized, capacitor C121 is charged through resistor R121 to a logical 1. Hysteresis is provided by R121 and R1228. Output Io4 is low, and Icil3 is high.

   When 12()V, AC control power is applied to IS with respect to ground, C1210 charges negatively through diode D1210. Voltage divider R1237 and R1219 pulls C121 down to logic 0. Diode D121 clamps the signal at V55. Output 1(4 goes high, and output lo 13 goes low. Resistor 1210 provides sufficient loading to prevent pilot contact leakage from appearing as a closed contact. A delay in output switching of greater than 50 milliseconds is seen when the AC input is removed.

   5. Mechanical As seen in Figure 13 the complete Automatic Power Transfer Control 12 consists of a power supply circuit board 102, a rack 104 holding twelve plug-in printed circuit modules 106, four barrier terminal strips 108 (only two of which are shown), a programming switch array (not shown), and the interconnecting wiring. Two of the modules, the Tie breaker Logic and the Control Logic, are used singly. The Frequency Sensor, Voltage Sensor, Main Breaker Logic, Delay Timer, and the AC Interface Circuit modules are used in pairs, one associated with each of the main circuit breaker. Figure 13 shows the ATC with the full complement of modules. The faceplate lenses with descriptive text are back-lighted by previously described light-emitting diodes to indicate the operating state of the ATC.For two-breaker transfer schemes, the Tie Breaker Logic module is simply omitted or replaced by a dummy module for front panel appearance. One or both Frequency Sensor modules may be similarly omitted. The less likely omission of other modules requires that the logic outputs of the omitted module be replaced by jumpers on the backplane wiring or on a dummy module.

   6. Summary With the versatility offered by programming switches, auxiliary inputs. and a wide range of frequency, voltage, and time delay settings, the Automatic Transfer Control is useful in a wide variety of transfer schemes. Sales personnel can lead customers and their consulting engineers through the "design" of transfer schemes by selection of the various options available. More accurate estimates of the cost of transfer schemes are possible, especially in the complex transfer schemes. and considerable savings in engineering, drafting, and wiring costs are obtained.

   Specifically, by providing programmable electronic digital logic means the invention provides a single device applicable to a wide variety of transfer strategies while using a minimum of power. Two- and three-breaker schemes are easily implemented since breaker status information is sensed from auxiliary contacts having a status opposite that of the main contacts. A plurality of timing functions are economically provided through the use of a plurality of oscillators cooperating with a single digital counter. The use of 120V AC Interface circuitry provides high noise immunity while simplifying installation. Additional flexibility is provided through the use of separate voltage sensors to determine which source to draw upon for control power and by employing a control power criterion of 55% of rated normal voltage.The provision for auxiliary transfer lockout. overcurrent lockout. ground fault lockout, automatic or manual return to either source. a "Keep Last Source" mode, and a live test mode in the present invention combine to provide a significant increase in performance and versatility over prior art automatic transfer control devices in an efficient and economic manner.

   WHAT WE CLAIM IS: I. Automatic power transfer control apparatus for selectively energizing an electrical distribution network from a pair of electrical power sources through associated circuit interrupters, comprising: first source sensing means for sensing electrical parameters of one of said electrical power sources: second source sensing means for sensing electrical parameters of the other of said electrical power sources; a plurality of means for generating output control signals for said associated circuit interrupters to selectively connect and disconnect said electrical power sources to said distribution network. characterized in that the apparatus includes digital logic means for activating said output control signal generating means in response to changes in electrical parameters of said sources detected by said sensing means and means for programming said logic means to automatically command said output control signal generating means to selectively produce any of a predetermined set of output signal combinations in response to a predetermined set of electrical parameters of slid electrical power sources.
2. 2. Apparatus as claimed in claim 1 comprising means responsive to the status of the

   associated circuit interrupters and connected to said electronic digital logic means to supply status information from the associated circuit interrupters to said electronic digital logic means.
3. 3. Apparatus as claimed in claim 2 wherein said status responsive means is responsive to the presence or absence of a control signal generated by the associated circuit interrupters and said status responsive means interprets the absence of said circuit interrupter control signal as an indication of CLOSE status upon the associated circuit interrupter.
4. 4. Apparatus as claimed in claim 1 comprising means for disabling the automatic function of said electronic digital logic means and means responsive to manually initiated input signals for activating said output control signal generating means to open and close the associated circuit interrupters.
5. 5. Apparatus as claimed in claim 1 comprising means for delaying the generation of said output control signals, said delay means comprising a plurality of oscillators and at least one counter connected to said oscillators, the number of counters being less than the number of oscillators, said at least one counter counting the cycles of said oscillator output to generate a predetermined time delay.
6. 6. Apparatus as claimed in claim S comprising two counters, one counter being associated with each of said source sensing means.
7. 7. Apparatus as claimed in claim 1 wherein each of said output control signal generating means comprises means for operating a high voltage alternating current output signal upon receipt of a logic-level input signal.
8. 8. Apparatus as claimed in claim 7 wherein said output control signal generating means comprises a triac.
9. 9. Apparatus as claimed in claim 1 comprising means separate from said source sensing means and connected to each of said sources for sensing electrical parameters on said sources and for supplying control power to said apparatus from one or the other of said sources according to predetermined criteria.
10. 10. Apparatus as claimed in claim 9 comprising means for supplying control power from said apparatus to external control equipment.
11. 11. Apparatus as claimed in claim 9 wherein said programming means comprises means for designating either of said sources as the normal source of control power to said apparatus.
12. 12. Apparatus as claimed in claim 1 comprising auxiliary lockout means responsive to an externally generated input signal to cause said electronic digital logic means to prevent said output signal generating means from generating any signals which would cause one or more associated circuit interrupters to close.
13. 13. Apparatus as claimed in claim 1 comprising latched lockout means responsive to an externally generated input signal to cause said electronic digital logic means to prevent said output signal generating means from generating any output signals which would cause any associated circuit interrupters to close, said apparatus further comprising latch reset means responsive to an externally generated signal to reset said electronic digital logic means and terminate the prevention function initiated by said latched lockout means.
14. 14. Apparatus as claimed in claim 1 comprising means responsive to an externally generated input signal to cause said electronic digital logic means to produce an activating signal to said output signal generating means to generate trip and close output signals to associated circuit interrupters, thereby causing associated circuit interrupters to disconnect one of said sources from said electrical distribution system and connect the other of said sources to said electrical distribution system.
15. 1S. Apparatus as claimed in claim 1 wherein said programming means comprises means for selectively placing said apparatus in first or second return modes; said apparatus, when in said first return mode. automatically causing associated circuit interrupters to reconnect said electrical distribution system to one of said sources when said one source returns to normal following a transfer operation in which said one source failed and said apparatus caused said one source to be disconnected from said electrical distribution system; said apparatus. when in said second return mode, causing associated circuit interrupters to reconnect said electrical distribution system to said one source only in response to externally generated input signals.
16. 16. Apparatus as claimed in claim 1 wherein said programming means comprises means cooperating with said electronic digital logic means for selectively placing said apparatus in a "Keep Last Source" mode. wherein said signal generating means are prevented from generating a trip signal to an associated circuit breaker connected to one of said sources, said prevent function being performed under the following conditions: (1) said apparatus has previously initiated a transfer operation in which said electrical distribution system has been connected to said one of said sources. and (2) said one of said sources subsequently fails, and (3) the other of said sources remains failed.
17. 17. Apparatus as claimed in claim 1, comprising: means for indicating the activating signals being supplied from said electronic digital logic means to said output signal generating means; means for disabling said output signal generating means so that no output signals will be generated despite the presence of activating signals from said electronic digital logic means; means connected to said source sensing means for selectively simulating failure of said sources; whereby the operation of said apparatus can be tested, without tripping or closing the associated circuit interrupters, disabling said output signal operating means, operating said failure simulation means, and observing said indicating means.
18. 18. Apparatus as claimed in claim 17 comprising means for placing said apparatus in a "live test" mode, wherein said disabling means are activated and said indicating means operate in a pulsing manner whenever an activating signal is supplied from said electronic digital logic means to said signal generating means; whereby operating personnel are informed by the pulsing operation of said indicating means that said apparatus is in the "live test" mode and associated circuit interrupters will not be operated.
19. 19. Apparatus as claimed in claim 18 wherein said apparatus is adapted to operate three associated circuit interrupters, and said disabling means selectively disable said output signal generating means to prevent operation of output signals destined for two associated circuit interruptcrs and allow generation of output signals destined for the third associated circuit interrupter.
20. 20. Apparatus as claimed in claim 1 comprising a plurality of control power transformers each connected to one of said sources; means switchable between each of said control power transformers for supplying control power to said automatic transfer control apparatus; means connected to said output signal generating means for sensing electrical conditions on said sources and for generating activating signals to said output signal generating means whenever electrical conditions on said sources vary by more than a first predetermined amount; and means connected to the output of said control power transformers and separate from said source condition sensing means for sensing the voltage upon said control power transformer outputs and for switching said power supply means from one of said control power transformers to the other of said control power transformers whenever voltage upon the output of said one control power transformer varies by more than a second predetermined amount.