GB1576055A - Formation of patterns of one material surrounded by another material on a substrate - Google Patents

Description

(54) FORMATION OF PATTERNS OF ONE MATERIAL SURROUNDED BY ANOTHER MATERIAL ON A SUBSTRATE (71) We, INTERNATIONAL BUSINESS MACHINES CORPORATION, a Corporation organized and existing under the laws of the State of New York in the United States of America, of Armonk, New York 10504, United States of America, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to methods of forming patterns of one material surrounded by another material on a substrate. In most applications, but not necessarily, the one material is electrically conductive and the other material is insulating.

According to one aspect of the invention, we provide a method of forming a patterned layer of one material surrounded by another material on a substrate, comprising forming a patterned composite layer on the substrate by forming a layer of said one material contiguous with one or more predetermined portions of the substrate and forming a layer of an expendable material contiguous with and substantially completely covering said one material. RF sputter depositing a layer of said other material on top of the patterned composite layer and the substrate at a bias which is sufficiently high to cause substantial re-emission of the material being deposited thereby covering the exposed substrate surface and the expendable material, but leaving the side surfaces of the expendable material exposed, etching the expendable material with an etchant which attacks neither said one material nor said other material thereby removing the expendable material and the portion of the layer of said other material disposed thereon to leave, on the substrate, areas of said one material surrounded by said other material.

Other aspects of the invention are defined in the claims appended hereto.

How the invention can be carried into effect will now be described by way of example, with reference to the accompanying sectional views of a structure being fab Figures 1A to 1K are diagrammatic, cross-sectional views of a structure being fabricated by a method embodying the in-, vention; Figures 2 to 5 are top surface views of some types of possible feed-throughs; Figures 6A and 6 are cross-sectional and top surface views, respectively, illustrating the connection of a first level conductor to a semiconductor region and a pair of com incident feedthroughs; Figure 7 is a partially sectioned, perspective view of a portion of an integrated circuit fabricated by a method embodying the invention; and Figures 8A to 8F are diagrammatic cross sectional views of a structure being fab ricated by a preferred method embodying the invention.

Although the invention is primarily directed at forming conductive patterns atop semiconductor substrates, its application extends to other types of thin films. In particular, the invention is relevant to any application contemplating a thin film pattern and a complementary thin film pattern lying in the same plane, e.g., thin films of dissimilar metals or dielectrics.

Figures 1A to 1C illustrate the formation of a composite of a conductive pattern and an identical pattern of an expendable material; the latter is removed in a later step by a lift-off process.

Our preferred lift-off process is that described in our copending application for United Kingdom Letters Patent No: 11810/76 (Serial No. 1482898). This method comprises the deposition of a first organic polymeric masking layer 4 on substrate 2 which is then baked to improve adhesion and thermal stability. A polydimethylsiloxane resin layer 6 having a preponderence of Si-O bonds relative to Si-CH3 bonds is spun-on over polymeric layer 4. A second masking layer, not shown, which may be a photoresist layer or an electronbeam resist layer, is placed on resin layer 4. The second masking layer is patterned using standard photo- or electron-beam lithographic techniques to expose portions of the resin layer in the desired pattern.

Using the patterned second masking layer as a mask, openings are reactively sputteretched in the resin layer using a fluorine gas ambient. Then, conforming openings 1 are made in the first masking layer by a second reactive-sputter-etching step in the same sputtering chamber using an oxygen gas ambient instead of the fluorine gas ambient. In the standard lift-off process, a thin metallic film is then blanket-deposited atop the resin and into openings 1 in the first masking layer. This layer is then removed, causing that portion of the thin film atop the resin to be lifted off. Overetching of the first masking layer 4 produces an overhang of the openings in the overlying polydimethylsiloxane resist layer 6 which facilitates easy lift-off of the unwanted portions of the finally-deposited thin films.

In our preferred embodiment, substrate 2 is typically an insulator such as silicon dioxide, silicon nitride, or a composite of silicon dioxide and silicon nitride. In the usual process the substrate is disposed atop a silicon semiconductor substrate (not shown. Openings, not illustrated, are pro; vided, to connect regions in the underlying semiconductor layer to the conductive patterns formed on the surface of the insulating substrate 2. For purposes of clarity and conciseness Figures 1A, which illustrate the preferred embodiment of the pro cuss, omit illustration of the silicon semiconductor as well as the contact openings in insulating layer 2.

In Figure 1B, utilizing the lift-off composite structure of Figure 1A, a functional metallic film 8 and an expendable working metallic film or cap 141. is blanket-deposited over the structure. Those portions of the films which are deposited within opening 1 are denoted by the numerals 8 and 14. The functional film may be any metal conventionally used for integrated circuit metallization, e.g. aluminum, aluminum-copper alloys, aluminum-copper-silicon, etc. Film 8 is deposited in a conventional manner having a thickness in the order of 1 to 2.5 micrometers. The expendable working fil m14 is in fact, three distinct layers of metal in the preferred embodiment, although a single metal would also suffice. The important point is that the working film or cap be removable by an etchant which does not attack functional metal 8 or the glass to be deposited. In the preferred embodiment, the expendable, working metal is a composite of chrome 11, copper 12 and chrome 13. The etchant is concentrated nitric acid. Chrome layer 11, which is typically deposited to a thickness of around 500 angstroms acts as a barrier to the alloying of the copper and aluminum. Chrome layer 13, which is also around 500A thick, acts to protect the copper from attacks by the solvent which removes photoresist layer 4.

Besides the particular metals discussed, a composite of chrome-silver-chrome or tantalum-gold-tantalum could be used in place of aluminum 8, with aluminum acting 'as the working metal rather than chrome-copperchrome cap 14. The etchant may then be potassium hydroxide solution.

Metal is selected as the expendable material because the RF sputtering temperatures are conventionally 3500C or more.

However, high temperature organic materials as well as dielectric materials could also be used. Throughout the specification, for purposes of clarity and conciseness, the lower conductive pattern 8 is termed "functional metal" and the expendable material 14 are termed "working metal" or "cap".

Broadly expressed however, layer 8 may be any thin film material and layer 14 is a material which may be removed without substantially affecting first thin film 8 or the second thin film which is to be deposited.

One technique for depositing the composite thin films 8 and 14 on substrate 2 uses the method described in U.K. Patent Specification No. 1450508. Other techniques could be used as well. For example, the technique described in United Kingdom Patent Ap; plication No. 11810/76 (Serial No. 1482898) or Patent Specification No. 1450509 could be used.

Returning to Figure 1C, utilizing conventional lift-off removal techniques, photoresist layer 4 is completely removed by immersion for about 15-30 minutes in a solvent such as N-methyl pyrrolidone standard photoresist solvent. As more completely described in the above reference copending application No. 11810/76 (Serial No.

1482898) the solvent selected is one which dissolves or swells the polymeric material of layer 4 without affecting the thin films.

Such solvents also include acetone, isopropanol. methyl ethyl ketone or trichlorethylene. This step results in the structure shown in Figure 1C, which is a composite of functional metal 8 and the working metal 14 on substate 2.

Other, less desirable, techniques could be used to arrive at the structure of Figure 1C.

In addition to lift-off techniques, standard reactive ion etching or sputter etching techniques might also be used, although they are less feasible at the present time. Such techniques generally comprise depositing blanket layers of the working and functional metals atop the substrate, applying an appropriate photoresist, developing the photoresist as a mask and removing the metal by reactive ion etching or sputter etching where the photoresist has been removed.

Figure 1D illustrates a critical step in our process. Insulator 20 is deposited in blanket fashion atop substrate 2 and metal layer 13.

The insulator, which is preferably glass, is deposited by RF sputtering at a bias which is sufficiently high to cause substantial reemission of insulator 20. As shown in Figure 1D, this results in the covering of the surfaces of the exposed substrate and cap 14, but leaving the side surfaces of cap 14 uncovered. The RF sputtering apparatus used to accomplish this is well known in the art and has been described in the publication "Power Networks For Substrates", R. P.

Auyang et al., IBM Technical Disclosure Bulletin, September 1971, page 1032. The system has also been described in the Patent Specification No. 1418278.

Using this type of RF sputtering system, we have deposited glass having the configuration illustrated in Figure 1D by sup plying a total power of 3000 watts to the RF sputtering system. The anode, on which the substrate is disposed, receives a power input of 500 watts; and the target electrode of silicon dioxide material to be deposited receives an input power of 2,500 watts. We have found that the sides of cap 14 are kept clear when the angle 0 of the side surfaces of 201 to the horizontal is 31 or less. The reemission co-efficient of the sputtered material during the deposition process is typici ally around 0.60.

The importance of maintaining the sides of the functional material 14 free of glass cannot be overemphasized. Our process is ineffective if there is any significant quantity of glass adhering to the sides.

However, if a small amount of glass did remain on the side surfaces of material 14, it could be removed by a dip into buffered HF etch for a short period. This would be sufficient to clean the side surfaces but would not significantly affect layer 20.

In Figure 1E the first level of metal and glass is shown after the working material 14 is removed. The etchant used to remove the chrome-copper-chrome cap 14 is preferably concentrated nitric acid which does not substantially attack either aluminum 8 or glass 20. In practice, the planar glass-metal structure is extremely smooth, being substantially without any steps or roughness often associated with other metallization processes. Scanning electron microscope examination of the structure has confirmed this.

Although our process is useful for forming a single level of a coplanar conductor and glass patterns, it is most advantageous in forming multi-level structures. In particular, the formation of via studs or feedthroughs between levels of metallization can also be performed using the same basic steps. The formation of a typical feedthrough is illustrated in Figures 1F to 1J. In Figure 1F the lift-off process previously described with particular reference to Patent Application No. 11810/76 (Serial No.

1482898) is begun. An opening 3 for a via stud in the composite photoresist-resin layer 24/26 is made over the first level conductive pattern 8. Opening 3 is illustrated as encompassing less than the full width of metal stripe 8. As will be explained in a later section of this specification, our process is not constrained in this manner. In fact, the prGF- cess lends itself to making studs of widths equal to, or greater than, the stripe. This is a significant advantage in forming wiring layers atop semiconductor structures.

In Figure 1G functional metal 28 and composite working metal 34 are deposited in the same fashion as previously described with respect to layers 8 and 14. The preferred embodiment contemplates also the use of aluminum as the functional metal and chrome-copper-chrome composite as the working metal. After the deposition, photoresist layer 24 is removed, thereby leaving a stud consisting of functional metal 28 and the working metal 34 as shown in Figure 1H.

Glass 40 is then deposited by RF sputtering at a bias which is sufficiently high to cause substantial reemission of the glass.

Angle 0 is 310 or less. As shown in Figure 1I, this sputtering process results in the covering of the exposed surfaces of cap 34 and glass layer 20. However, the side surfaces of cap 34 are left completely exposed.

As shown in Figure 1J the process for forming the feedthrough stud is completed by lifting-off cap 34. As indicated previously, to remove a chrome-chopper-chrome composite cap concentrated nitric acid is suitable.

Figure 1K illustrates a five level conductive film structure formed atop a substrate and using the same process steps to achieve each of three levels of metallization as well as the feedthroughs between levels.

Thus, metallization 8, 41 and 48 are conductive patterns formed in three levels and interconnected by feedthroughs 28 and 47.

One advantage of our process is the relative independence of the thickness of the insulating layer, say layer 46, to the thickness of the underlying metallization 41.

Bumps, crevices and spikes in standard structures are regions which are difficult to cover. However, when non-planarity of layers is reduced, less overlying glass is required to assure adequate insulation between metallization layers.

Another principal advantage of this technique is that feedthroughs of various geometrical design with respect to the underlying and overlying metallization may be fabricated. Some of the structures are illustrated in Figures 2-5 which are top surface views of feedthrough studs. Figure 2 illustrates a feedthrough 28 disposed atop a metallic line 8 on a substate 40. The width of feedthrough 28 is less than the width of line 8. This is the configuration most often used in present day semiconductor processing and is the one illustrated in Figures 1A through 1K.

In Figure 3 feedthrough 128 is slightly misaligned with respect to conductive stripe 108. In ordinary circumstances this would represent a substantial misalignment, resulting in etching of glass layer 140 at undesired locations. Such overetching quite often results in shorts between metallization layers.

However, in the present process such mis alignment would be acceptable because no etching of the insulation layers takes place.

Figures 4 and 5 illustrate structures wherein the widths of the feedthrough are larger than the widths of the conductive lines to which they make contact. Thus, in Figure 4 stud 228 is disposed atop conductive stripe 208. Stud 228 completely overlaps the three sides of stripe 208 and also contacts the surface of dielectric layer 240. A significant advantage of the type of structure shown in Figures 4 and 5 is that mask misalignment, which would be significant in prior art methods, poses no problem because there is a greater chance -that stud 228 will contact all or a significant portion of stripe 208.

Again, the reason why such via stud structures are possible is that no etching of dielectric layers takes place.

The concept of fabricating vias having widths which are greater than the width of the underlying conductive stripe has been described previously in the U.K. Patent Specification No. 1433624. The aforementioned patent achieves similar structures by providing insulating layers of dis-similar etching characteristics in the adjacent levels of metallurgy. Our technique on the other hand, requires only a single type of insulator with no etching of the insulator being required.

Figures 6A and 6 are cross-sectional and top surface views, respectively, which illustrate the connection of a first level conductor 408 to a semiconductor impurity doped (region 23 and a pair of coincident feedthroughs 428 and 429 connected by an intermediate layer 430.

Although a depression exists in conductor 408 where it connects to contact 21 and semiconductor region 23, this is relatively minor depending on the thickness of insulator 427.

A significant area is the upper surface of feedthrough 429, which is coplanar with insulator 442. There are no thin sidewalls where feedthrough 429 contacts insulator 442, as would exist in standard processes.

Although a principal thrust has been the formation of multiple levels of metallurgy without the necessity for etching dielectric layers, selected levels could be fabricated by conventional etching steps. For example in Figure 1 E there is shown a planar, first level, metal glass insulator layer. Rather than using steps shown in Figures 1F--1J to form the via stud, a conventional process could also be used, although it is less desirable. A second dielectric layer could be sputter-deposited or chemically-vapordeposited atop the planar layer and via a hole etched by conventional techniques atop first metal layer 8. The via contact could then be formed in the aperture, either alone or in combination with a metallic pattern disposed atop the second dielectric layer.

It has already been mentioned that the insulator may be deposited initially, on top of which is deposited an expendable material. A conductive thin film may then be deposited by the unique RF sputtering step.

The same substantially coplanar layer will then be achieved after the removal of the expendable material.

The invention is also applicable to the fabrication of coplanar conductors, to form waveguides for example, or coplanar dielectrics for optical waveguides.

In Figure 7, there is shown a first level thin metal film strip 8 which is connected through a dielectric layer 4 to an impurity doped region 3 in a semiconductor substrate 2. Film 8 represents a portion of a complex conductive pattern atop chip 2 and is illustrated as being relatively elongated for connection to a second level of metallization 12 as well as to other films (not shown) on the first level. A feedthrough, or connection stud, 10 interconnects film 12 and film 8 through a dielectric layer 20. Layer 20 is preferably silicon dioxide. The process for forming this type of interconnection is described with reference to Figures 8A to 8F.

For purposes of clarity and conciseness, the conductive pattern which remains as part of the metallization system is termed "functional metal" and the material deposited atop the functional metal and subsequently removed is termed "working metal" or "cap". Broadly expressed however, the functional metal may be any electrically conductive material; the cap is a material which may be removed without substantially affecting the functional metal or the substrate disposed thereunder. Due to the high tem peratures involved in RF sputtering, metal is more suitable as the expendable material than an organic or an inorganic dielectric.

However, our invention is not to be construed as limited to metals. The substrate may be a semiconductor material such as silicon or a semiconductor substrate having a surface layer of an electrically insulative material, such a silicon dioxide, silicon nitride or a composite layer of silicon di oxide and silicon nitride.

Turning now to the process, Figure 8A shows a cross-section of thin metallic film 8 disposed atop insulative substrate 4. As previously noted, film 8 comprises a portion of a first level conductive pattern which is generally interconnected through sub strate 4 to an impurity doped region or regions within a semiconductor substrate 2.

Film 8 is also interconnected to other such films on the same level to form device-todevice and circuit-to-circuit interconnections, as is well known in the art.

One technique for depositing thin film 8 on substrate 4 corresponds to the basic method described in U.K. Patent Specifica tion No. 1450508. Other techniques could be used as well. For example, the technique described in our co-pending application for United Kingdom Letters Patent No.

11810/76 (Serial No. 1482898) or the technique described in U.K. Patent Specification No. 1450509 could be used.

Our preferred lift-off process is that described in our copending application for United Kingdom Letters Patent No.

11810/76 (Serial No. 1482898). Briefly this method comprises the deposition of a first organic polymeric masking layer on sub strate 4 which is then baked to improve adhesion and thermal stability. A polydimethylsiloxane resin layer having a prepon.

derence of Si-O bonds relative to Si-CHa bonds is spun-on over the polymeric layer.

A second masking layer, which may be photoresist or an electron-beam resist, is placed on the resin layer. The second masking layer is patterned using standard photoor electron-beam lithographic techniques to expose portions of the resin layer in the desired pattern. Using the patterned second masking layer as a mask, openings are reactively-sputter-etched in the resin layer using a fluorine gas ambient. Then, conforming openings are made in the first mask -ing layer by a second reactive sputter etching step in the same sputtering chamber using an oxygen gas ambient instead of the fluorine gas ambient. Thin metallic film 8 is then blanket-deposited atop the resin and in the first masking layer openings atop substrate 4. The first masking layer is then removed, causing that portion of the thin film atop the resin to be lifted off. Overetching of the first masking layer produces an overhang of the openings in the overlying polydimethysiloxane resin layer which facilitates easy lift-off of the unwanted portions of the finally-deposited thin film 8.

Other techniques beside lift-off could be used to arrive at the structure of Figure 8A.

For example, standard reactive ion etching or sputter etching techniques might also be used, although they are less feasible at the present time. Such techniques generally comprise depositing blanket layers of the metal film 8 atop substrate 4, applying an appropriate photoresist, developing the photoresist as a mask for the desired pattern and removing the unwanted metal by reactive ion etching or sputter etching where the photoresist has been removed.

The formation of feedthrough 10 is illustrated in Figures 8B to 8E. In Figure 8B, the lift-off process previously described with particular reference to Patent Application No.

11810/76 (Serial No. 1482898) is used to form a composite of feedthrough 10 and working metal cap 11 atop first metal film 8.

In the preferred process, organic polymeric masking layer 18 is deposited atop substrate 4 and metal film 8. After baking polydimethylsiloxane resin 19 is spun on over layer 18. A second masking layer, not shown, is deposited atop resin 19 and patterned to expose portions of resin 19 to be used for the feedthrough locations. Using the patterned second masking layer as a mask, openings are reactively etched in resin 19 using a fluorine gas ambient. Conforming openings are then made in masking layer 18 by a second reactive etching step using an oxygen gas ambient instead of.

fluorine.

Next, using the lift-off composite structure 19/18, metallic films 101 and 111, which are used to form the functional metallic feedthroughs and caps, are blanketdeposited over the structure. Feedthrough 10 is preferably aluminium, an aluminiumcopper alloy or aluminium-copper-silicon; cap 11 is preferably a composite layer of chrome-copper-chrome, altrough it may comprise a single copper layer. An initial layer of chrome is typically deposited to a thickness of around 500A to act as a barrier to the alloying of the copper and aluminium.

A chrome layer disposed atop the copper layer protects the copper from attack by the etchant used subsequently to remove layer 18.

Besides the particular metals discussed, a composite layer of chrome-silver-chrome or tantalum-gold-tantalum could be used in place of the aluminium feedthrough with aluminium acting as the expendable cap rather than chome-copper-chrome.

Finally, utilizing the conventional lift-off removal techniques, photoresist layer 18 is completely removed by immersion into a sol vent, such as N-methyl pyrrolidone standard photoresist solvent, for about 15 to 30 minutes, which leaves thin film composite 8/10/11 in the desired pattern configura tion of Figure 8C. The solvent selected should be one which dissolves or swells the polymeric material of layer 18 without affecting the thin film. Such solvents include acetone, isopropanol, methyl ethyl ketone or trichloroethylene.

Figure 8D illustrates a critical step in our process. Insulator 20 is sputter-deposited in blanket fashion atop substrate 2 and metal layer 11. The insulator, which is preferably glass, is deposited to RF sputtering at a bias which is sufficiently high to cause substan tial reemission of insulator 20. As shown in Figure 8D, this results in the covering of the exposed substrate surfaces and layer 11, but leaving the side surfaces of layer 11 un covered.

The RF sputtering apparatus to accomp lish this is well known in the art and has been described in the publication "Power Networks for Substrates", R. P. Auyang et al, IBM Technical Disclosure Bulletin, September 1971, page 1032. The system has also been described in the patent issued in U.K. Patent Specification No. 1418278.

Using this type of RF sputtering system, glass 20, having the configuration illustrated in Figure 8D, is deposited by supplying a total power of 3000 watts to the RF sputter ing system. The anode power on which the substrate is disposed receives a power input of 500 watts; the target electrode of silicon dioxide material to be deposited receives an input power of 2500 watts. The edges of layer 11 are kept clear when the angle lA of glass layer 20l to the horizontal is 310 or less. The reemission coefficient of the sput tered material during the deposition process is typically around 0.60 or greater.

In practice, feedthrough 10 must be as thick as the RF sputtered glass 20 to en sure that cap 11 remains exposed. More over, the thickness of feedthrough 10 must be sufficient to ensure the adequate cover age of metal 8 by glass 20. In practice, then, if metal 8 is 1 micron thick, glass 20 and connection stud 10 must be around 2 microns thick.

The importance of maintaining the sides of the working material 11 free of glass can not be overemphasized. Our process is in! effective if there is any significant quantity of glass adhering to the sides of material 11.

However, if small quantities of glass did remain on the side surfaces of cap 11, the former could be removed by a dip into buf fered HF for a short period. This would be sufficient to clean the side surfaces of cap 11 but would not significantly affect layer 20.

In Figure 8E the first level metal 8 and feedthrough 10 is shown after the working material 11 is removed. The etchant used to remove chrome-copper-chrome cap 11 is preferably concentrated nitric acid, which does not substantially attack either aluminum, silicon nitride or glass. If aluminum were used as cap 11 and chrome-silverchrome or tantalum-gold-tantalum comprised metal 10, potassium hydroxide solution would be used as the etchant.

Figure 8F illustrates the structure wherein a second level of wiring 12 is deposited atop feedthrough 10 to complete a two level pattern.

WHAT WE CLAIM IS:- 1. A method of forming a patterned layer of one material surrounded by another material on a substrate, comprising forming a patterned composite layer on the substrate by forming a layer of sa

Claims (31)

1. **WARNING** start of CLMS field may overlap end of DESC **.

   completely removed by immersion into a sol vent, such as N-methyl pyrrolidone standard photoresist solvent, for about 15 to 30 minutes, which leaves thin film composite

   8/10/11 in the desired pattern configura tion of Figure 8C. The solvent selected should be one which dissolves or swells the polymeric material of layer 18 without affecting the thin film. Such solvents include acetone, isopropanol, methyl ethyl ketone or trichloroethylene.

   Figure 8D illustrates a critical step in our process. Insulator 20 is sputter-deposited in blanket fashion atop substrate 2 and metal layer 11. The insulator, which is preferably glass, is deposited to RF sputtering at a bias which is sufficiently high to cause substan tial reemission of insulator 20. As shown in Figure 8D, this results in the covering of the exposed substrate surfaces and layer 11, but leaving the side surfaces of layer 11 un covered.

   The RF sputtering apparatus to accomp lish this is well known in the art and has been described in the publication "Power Networks for Substrates", R. P. Auyang et al, IBM Technical Disclosure Bulletin, September 1971, page 1032. The system has also been described in the patent issued in U.K. Patent Specification No. 1418278.

   Using this type of RF sputtering system, glass 20, having the configuration illustrated in Figure 8D, is deposited by supplying a total power of 3000 watts to the RF sputter ing system. The anode power on which the substrate is disposed receives a power input of 500 watts; the target electrode of silicon dioxide material to be deposited receives an input power of 2500 watts. The edges of layer 11 are kept clear when the angle lA of glass layer 20l to the horizontal is 310 or less. The reemission coefficient of the sput tered material during the deposition process is typically around 0.60 or greater.

   In practice, feedthrough 10 must be as thick as the RF sputtered glass 20 to en sure that cap 11 remains exposed. More over, the thickness of feedthrough 10 must be sufficient to ensure the adequate cover age of metal 8 by glass 20. In practice, then, if metal 8 is 1 micron thick, glass 20 and connection stud 10 must be around 2 microns thick.

   The importance of maintaining the sides of the working material 11 free of glass can not be overemphasized. Our process is in! effective if there is any significant quantity of glass adhering to the sides of material 11.

   However, if small quantities of glass did remain on the side surfaces of cap 11, the former could be removed by a dip into buf fered HF for a short period. This would be sufficient to clean the side surfaces of cap 11 but would not significantly affect layer 20.

   In Figure 8E the first level metal 8 and feedthrough 10 is shown after the working material 11 is removed. The etchant used to remove chrome-copper-chrome cap 11 is preferably concentrated nitric acid, which does not substantially attack either aluminum, silicon nitride or glass. If aluminum were used as cap 11 and chrome-silverchrome or tantalum-gold-tantalum comprised metal 10, potassium hydroxide solution would be used as the etchant.

   Figure 8F illustrates the structure wherein a second level of wiring 12 is deposited atop feedthrough 10 to complete a two level pattern.

   WHAT WE CLAIM IS:- 1. A method of forming a patterned layer of one material surrounded by another material on a substrate, comprising forming a patterned composite layer on the substrate by forming a layer of said one material contiguous with one or more predetermined portions of the substrate and forming a layer of an expendable material contiguous with and substantially completely covering said one material, RF sputter depositing a layer of said other material on top of the patterned composite layer and the substrate at a bias which is sufficiently high to cause substantial re-emission of the material being deposited thereby covering the exposed substrate surface and the expendable material, but leaving the side surfacess of the expendable material exposed, etching the expendable material with an etchant which attacks neither said one material nor said other material thereby removing the expendable material and the portion of the layer of said other material disposed thereon to leave, on the substrate, areas of said one material surrounded by said other material.
2. 2. A method as claimed in claim 1, in which said one material is a conductor and said other material is an insulator.
3. 3. A method of forming connection studs surrounded by insulating material on a pattern of conductive material on a substrate, comprising forming a composite layer on portions of the conductive pattern, the composite layer being formed by forming a metal layer contiguous with the portions of the conductive pattern and a layer of expendable material contiguous with and substantially completely covering the metal layer, RF sputter depositing a layer of insulating material on top of the composite layer and the pattern of conductive material at a bias which is sufficiently high to cause substantial reemission of the material beingdeposited thereby covering the exposed pattern of conductive material and the expend

   able material, but leaving the side surfaces of the expendable material exposed, etching the expendable material with an etchant which attacks neither the metal layer nor the deposited insulating material thereby removing the expendable material and the portions of the insulating material disposed thereon to leave metal connection studs on said portions of the conductive pattern surrounded by said deposited insulating material.
4. 4. A method as claimed in claim 2 or claim 3, in which said one material or said metal layer, respectively, consists of aluminium.
5. 5. A method as claimed in claim 2 or claim 3, in which said one material or said metal layer, respectively, consists of an alloy of aluminium and copper.
6. 6. A method as claimed in claim 2 or claim 3, in which said one material or said metal layer, respectively, consists of an alloy of aluminium, copper and silicon.
7. 7. A method as claimed in any of claims 4 to 6, in which the layer of expendable material consists of copper or a composite layer of chromium-copper-chromium and the etchant is nitric acid.
8. 8. A method as claimed in claim 2, or claim 3, in which the layer of said one material or said metal layer, respectively, consists of a composite layer of chromiumsilver-chromium.
9. 9. A method as claimed in claim 2 or claim 3, in which the layer of said one material or said metal layer, respectively, consists of a composite layer of tantalum-goldtantalum.
10. 10. A method as claimed in claim 8 or claims 9, in which said expendable material consists of aluminium and the etchant is potassium hydroxide solution.
11. 11. A method of forming a multi-level conductor structure, including forming connection studs surrounded by insulating material on a first pattern of conductive material by a method as claimed in claim 3, or any of claims 4 to 10 when appendant to claim 3, and forming a second pattern of conductive material on top of the insulating material whereby the connection studs form conductive feedthrough paths between the first and second conductive patterns.
12. 12. A method as claimed in claim 1, in which said one material is an insulator and said other material is a conductor.
13. 13. A method as claimed in any preceding claim, in which the layer of said one material or said metal layer, respectively, is from 1 to 2.5 micrometers thick.
14. 14. A method of fabricating a multilevel film structure comprising: forming a first pattern on a substrate which includes a first film and a first expendable material disposed on said first film; depositing a seo ond film atop said substrate and said pattern by RF sputtering at a bias which is sufficiently high to cause substantial reemission of said second film, thereby covering the exposed substrate surfaces and the first expendable material, but leaving the side surfaces of said first expendable material exposed; said first expendable material be ing etchable by a first etchant which does not attack either the first or the second film; and etching said first expendable material with said first etchant, thereby removing said first expendable material and that portion of the second film disposed thereon and leaving a substantially coplanar first-level pattern of said first and second films; forming a second pattern on said first level pattern which includes a third film and a second expendable material disposed on said third film; depositing a fourth film atop said substrate and said second pattern by RF supttering at a bias which is sufficiently high to cause substantial reemission of said fourth film, thereby covering the exposed first level pattern and the second expendable material, but leaving the side surfaces of said second expendable material exposed; said second expendable material being etchable by a second etchant which does not attack either said third or said fourth film; and etching said second expendable material with said second etchant, thereby removing said second expendable material and that portion of the fourth film disposed thereon and leaving a substantially coplanar second-level pattern of said third and fourth films.
15. 15. A method as claimed in claim 14, wherein said first and third films are conductive and said second and fourth films are insulators.
16. 16. A method as claimed in claim 15, wherein said second level pattern is a feedthrough pattern for connecting said first conductive films to one or more succeeding film levels.
17. 17. A method as claimed in claim 16, wherein at least one of said conductive films consists of aluminium, aluminium-copper alloy or aluminium-copper-silicon alloy.
18. 18. A method as claimed in claim 17, wherein at least one of said layers of expendable material consists of copper or a composite layer of chromiunx-copper- chromium; and at least one of said etchants is nitric acid.
19. 19. A method as claimed in claim 16, wherein at least one of said conductive films consists of a composite layer of chromiumsilver-chromium or tantalum-gold-tantalum.
20. 20. A method as claimed in claim 19, wherein at least one of said expendable materials is aluminium; and at least one of said etchants is potassium hydroxide solution.
21. 21. A method as claimed in claim 16, further comprising the steps of: forming a third pattern on said second-level pattern which includes another conductive film and a third expendable material disposed on said other film; at least a portion of said third pattern being connected to said feedthrough pattern; depositing another insulating film atop said second level pattern and said third pattern by RF sputtering at a bias which is sufficiently high to cause substantial reemission of said other insulating film, thereby covering the exposed second level pattern and the third expendable material, but leaving the side surfaces of said third expendable material exposed; said third expendable material being etchable by a third etchant which does not attack either of said other films; and etching said third expendable material with said third etchant, thereby removing said third expendable material and that portion of the insulator deposited thereon and leaving a substantially coplanar third level pattern of said other conductive and insulating films.
22. 22. A method as claimed in claim 21, wherein at least one of said conductive films consists of aluminium, aluminium-copper alloy or aluminium-copper-silicon alloy.
23. 23. A method as claimed in claim 22, wherein at least one of said layers of expendable material consists of copper or a composite layer of chromium-copper- chromium; and at least one of said etchants is nitric acid.
24. 24. A method as claimed in claim 21, wherein at least one of said conductive films consists of chromium-silver-chromium ' or tantalum-gold-tantalum.
25. 25. A method as claimed in claim 24, wherein at least one of said expendable materials is aluminium; and at least one of said etchants is potassium hydroxide solution.
26. 26. A method as claimed in claim 14, wherein said first and third films are insulators and said second and fourth films are conductive.
27. 27. A method as claimed in claim 14, wherein said substrate includes one or more substantially coplanar patterns of films.
28. 28. A method of forming a patterried layer of one material surrounded by another material on a substrate, substantially as described with reference to Figures 1A to 1E of the accompanying drawings.
29. 29. A method of forming a multi-level conductive-layer structure substantially as described with reference to Figures 1A to 1K of the accompanying drawings.
30. 30. A method of forming connection studs surrounded by insulating material on a pattern of conductive material on a substrate, substantially as described with reference to Figures 8A to 8E of the accompanying drawings.
31. 31. A structure formed by a method as claimed in any preceding claim.