GB1562363A

GB1562363A - Dividing voltage-frequency convertor

Info

Publication number: GB1562363A
Application number: GB3264077A
Authority: GB
Original assignee: Siemens AG
Current assignee: Siemens AG
Priority date: 1976-08-20
Filing date: 1977-08-03
Publication date: 1980-03-12
Also published as: DE2637657A1; DE2637657B2; DE2637657C3; FR2362533A1

Description

(54) A DIVIDING VOLTAGE-FREQUENCY CONVERTOR (71) We, SIEMENS AKTIEN GELLSCHAFT, a German company of Berlin and Munich, Germany (fed rep), do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement:- The invention relates to dividing voltagefrequency convertors.

In many electrical measuring problems, it is desired to find a value which is a quotient of two quantities. Before the value to be found can be produced as an electrical signal, the two individual quantities must be divided one by the other. There therefore exists a requirement for driving units which are as simple as possible. If the end result is to be presented as a digital value, the two individual quantities (which are generally obtained as analog values) can first be converted into digital values which are thereafter combined in a digital dividing unit to form a quotient. This quotient is then also presented as a digital value.

According to the present invention there is provided a dividing voltage-frequency convertor comprising an integrator which includes an operational amplifier and a capacitor and which is arranged such that a positive input voltage fed to the converter and representing a dividend of a quotient to be formed by the convertor will result in the capacitor being charged and consequently a positively rising output voltage being supplied by the operational amplifier, there being a comparator having a first input coupled to the output of the operational amplifier, a second input available to receive a reference voltage providing a divisor of said quotient, and an output arranged to emit a pulse when the positively rising output voltage becomes equal to the reference voltage, which pulse causes discharge of said integration capacitor and consequently a drop in said positively rising output voltage, whereby the repetition frequency of the output pulses of the comparator is proportional to the value of said quotient.

The input voltage of the integrator and the reference voltage fed to the comparator must have the same sign.

The Miller integrators usually employed in voltage-frequency convertors have a property which is found to be a disadvantage. Their integration capacitors are not at a fixed potential. Therefore, floating-potential switches must be provided as the switches for discharging the capacitors. The field effect transistors conventionally employed as such switches do not permit a sudden discharge of the integration capacitor. The resultant discharge time brings about a linearity error in the conversion.

A preferred embodiment of the present invention, which at the same time also obviates the aforesaid disadvantage, is one in which the voltage forming the dividend is applied through a resistor to the noninverting input of the operational amplifier and to earth, and the same input is connected to earth through the integration capacitor and to the output of the operational amplifier through a resistor.

The inverting input of the operational amplifier is connected to its output through a resistor and to earth through a further resistor of equal value. The integration capacitor is bridged by the emitter-collector path of a switching transistor whose base is connected to the output of a second operational amplifier serving as the comparator. The non-inverting input of the latter is connected to the output of the firstmentioned operational amplifier, while the voltage forming the divisor is present at the inverting input of the operational amplifier acting as the comparator. There can be taken from the output of the comparator operational amplifier a pulse train whose repetition frequency is proportional to the quotient.

The integration capacitor of this arrangement has one electrode connected to earth, i.e. to a fixed potential. It is therefore unnecessary to use as the discharge switch a floating-potential field effect transistor, but there may be provided-for this purpose a normal switching transistor whose change-over time and "on" current permit a substantially instantaneous discharge of the integration capacitor. The discharge time of the capacitor is thus very short in relation to the charging time, and hence the aforementioned linearity error of the conversion is negligible.

If the quotient is to appear as a digital value, there is desirably employed a counter whose counting input is acted on by the output frequency of the voltage-frequency convertor through a gate controlled by a time base.

If a multiplication is to be effected in addition to the division, the preferred embodiment must be so modified that the base of the switching transistor is connected to one output of a flip-flop whose reset input is connected to the output of the second operational amplifier serving as the comparator. The dynamic input of the flipflop is acted on by a pulse train of variable frequency, while its outer output is connected to the input of a low-pass filter, from the output of which there can be taken a voltage proportional to the product of the quotient of the input voltages times the frequency of the pulse train.

For a better understanding of the invention and to show how it may be carried into effect reference will now be made, by way of example, to the accompanying drawing in which: Figure 1 shows a dividing voltage frequency convertor according to the invention; and Figure 2 shows a modified version of the convertor of Figure 1.

Figure 1 shows an input voltage U, representing a dividend and present at two input terminals 1 and 2. The input terminal 1 is connected to the non-inverting input of an operational amplifier OP, through a resistor R. The input terminal 2 is connected to earth. The noninverting input of the operational amplifier OP, is also connected to earth, through a capacitor C. In addition, it is connected to the output of the operational amplifier OP1 through a further resistor R.

An inverting input of the operational amplifier OP, is connected to the point of connection of a voltage divider consisting of two further resistors, which is situated between the output of the operational amplifier OP, and earth. A voltage Unit is measurable against earth at the output of the operational amplifier OP,. All the resistors R have the same value.

In addition, there is connected to the output of the operational amplifier OP, a non-inverting input of a second operational amplifier OP2 connected as a comparator. a voltage U2 being present at the inverting input 3 of the latter and at earth 4.

The capacitor C across which a voltage Uc can be measured is bridged by the collector-emitter path of a switching transistor T. The base electrode of the switching transistor T is connected to the output of the comparator amplifier OP2 through an unreferenced resistor. A pulse train having the frequency fQ can be taken with respect to earth from the said output.

In the circuit diagram, there are shown arrows denoted by il to i4, which are intended to represent currents for which the following relationships can be derived from the figure with the inserted designations: U,-U, il R i2= i2= R R i3+i4=il+i2; i4=0 i3=il +i2 U1Uc UintUc i3= + R R U+Uint2 Uc i3= R Owing to the voltage divider at the output of the operational amplifier OP1, to the tap of which there is connected the inverting input of operational amplifier OP1, the amplifier OP, has a gain of two. Therefore, Quint=2 Uc. Consequently, there is obtained for i3 U, R This current constitutes the charging current of the capacitor c. It flows until the capacitor C has been charged. The charging time will be denoted by t. There then applies i3.t=Q=C.UC, Q being the charge quantity can be taken up by the capacitor C. After cqnversion, there is obtained i3.t U1 Uc=~ ~ .t C R.C However. there also applies U 2 and hence U1.2 UInt= t R.C.

This voltage present at the output of the operational amplfier OP, can consequently be regarded as the result of an integration.

because

With U constant

After integration, there is obtained as expected 2 Ujnt= U,.T R.C After application of a voltage U, to the terminals 1 and 2, the output voltage Ujnt of the operational amplifier OP, rises in ramp form until it reaches the value of the voltage U2 present across the terminals 3 and 4. The operational amplifier OP2 designed as a comparator then turns on the transistor T, whereby the capacitor C is suddenly discharged. The voltage Quint is then lower than the voltage U2. Therefore, the comparator OP2 switches back the transistor T, which is thereby turned off.

There is again present at the output of the operational amplifier OP, a positive ramp voltage. This cycle is repeated as long as the voltages U1 and U2 are present and, with fixed values of the switching elements, is influenced only by them.

The repetition rate or the duration T of the period of the cycle is calculated as follows; the integrator integrates until U,nt=U2: t=T.

However, since U,nt was equal to 2.U1 R.C T is equal to U2 R.C U, 2 The frequency of the pulse train to be taken from the output of the comparator OP2 is therefore U, 7 62 R.C Hence. the frequency is proportional to the quotient of U1 bq U2. Of course. the circuit arrangement may also be employed as a simple voltage-frequency converter if the voltage U2 is kept constant.

In Figure 2, like circuit elements to Figure 1 are denoted by like references. The modification as compared with the circuit arrangement according to Figure 1 resides in that the output of the operational amplifier OP2 is connected to the reset input of a flip-flop FF, the flip-flop output which characterises the set condition of the flipflop FF being connected to the base electrode of the switching transistor T through an unreference resistor, while a dynamic input of the flip-flop FF is acted on a a pulse voltage having the repetition frequency f3. The input connections to the amplifier OP2 are reversed as compared with Figure 1, because the reset input of the flip-flop FF must be activated by logic 0 signals.The other output of the flip-flop FF is connected to the input of a low pass filter TP, from the output of which there can be taken a voltage Us which is proportional to the quotient of the voltage U, by the voltage U2, multiplied by the frequency f2. At the input of the low-pass filter TP there can be measured with respect to earth a pulsating voltage U4 For the voltage U5, there is obtained U2 R.C.k TP U5 .f3.

U. 2 where k TP is a scaling factor determined by the low pass filter.

A modification of the circuit arrangement according to Figure 2, in which the voltages U1 and U2 are equal and maintained constant, may be used as a timing device.

The activation here takes place by waq of the dynamic input of the flip-flop. The output pulse. which represents a time interval, is taken from one output of the flipflop. which is not connected to the switching transistor T. The time interval Is here dependent only upon the values of the capacitor C and of the resistors R.

WHAT WE CLAIM IS: 1. A dividing voltage-frequency convertor comprising an integrator which includes an operational amplifier and a capacitor and which is arranged such that a positive input

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. However. there also applies U 2 and hence U1.2 UInt= t R.C. This voltage present at the output of the operational amplfier OP, can consequently be regarded as the result of an integration. because With U constant After integration, there is obtained as expected 2 Ujnt= U,.T R.C After application of a voltage U, to the terminals 1 and 2, the output voltage Ujnt of the operational amplifier OP, rises in ramp form until it reaches the value of the voltage U2 present across the terminals 3 and 4. The operational amplifier OP2 designed as a comparator then turns on the transistor T, whereby the capacitor C is suddenly discharged. The voltage Quint is then lower than the voltage U2. Therefore, the comparator OP2 switches back the transistor T, which is thereby turned off. There is again present at the output of the operational amplifier OP, a positive ramp voltage. This cycle is repeated as long as the voltages U1 and U2 are present and, with fixed values of the switching elements, is influenced only by them. The repetition rate or the duration T of the period of the cycle is calculated as follows; the integrator integrates until U,nt=U2: t=T. However, since U,nt was equal to 2.U1 R.C T is equal to U2 R.C U, 2 The frequency of the pulse train to be taken from the output of the comparator OP2 is therefore U, 7 62 R.C Hence. the frequency is proportional to the quotient of U1 bq U2. Of course. the circuit arrangement may also be employed as a simple voltage-frequency converter if the voltage U2 is kept constant. In Figure 2, like circuit elements to Figure 1 are denoted by like references. The modification as compared with the circuit arrangement according to Figure 1 resides in that the output of the operational amplifier OP2 is connected to the reset input of a flip-flop FF, the flip-flop output which characterises the set condition of the flipflop FF being connected to the base electrode of the switching transistor T through an unreference resistor, while a dynamic input of the flip-flop FF is acted on a a pulse voltage having the repetition frequency f3. The input connections to the amplifier OP2 are reversed as compared with Figure 1, because the reset input of the flip-flop FF must be activated by logic 0 signals.The other output of the flip-flop FF is connected to the input of a low pass filter TP, from the output of which there can be taken a voltage Us which is proportional to the quotient of the voltage U, by the voltage U2, multiplied by the frequency f2. At the input of the low-pass filter TP there can be measured with respect to earth a pulsating voltage U4 For the voltage U5, there is obtained U2 R.C.k TP U5 .f3. U. 2 where k TP is a scaling factor determined by the low pass filter. A modification of the circuit arrangement according to Figure 2, in which the voltages U1 and U2 are equal and maintained constant, may be used as a timing device. The activation here takes place by waq of the dynamic input of the flip-flop. The output pulse. which represents a time interval, is taken from one output of the flipflop. which is not connected to the switching transistor T. The time interval Is here dependent only upon the values of the capacitor C and of the resistors R. WHAT WE CLAIM IS:

1. A dividing voltage-frequency convertor comprising an integrator which includes an operational amplifier and a capacitor and which is arranged such that a positive input

voltage fed to the convertor and representing a dividend of a quotient to be formed bv the converter will result in the capacitor being charged and consequentls a positively rising output voltage being supplied by the operational amplifier, there being a comparator having a first input coupled to the output of the operational amplifier, a second input available to receive a reference voltage providing a divisor of said quotient, and an output arranged to emit a pulse when the positively rising output voltage becomes equal to the reference voltage, which pulse causes discharge of said integration capacitor and consequently a drop in said positively rising output voltage, whereby the repetition frequency of the output pulses of the comparator is proportional to the value of said quotient.

2. A converter according to claim 1, u-herein an input of the convertor for receiving said dividend is connected via a resistor to a non-inverting input of said operational amplifier, via said integration capacitor to earth, and via a further resistor to the output of said operational amplifier.

3. A convertor according to claim 2, wherein one terminal of said convertor input is connected to earth.

4. A convertor according to any one of the preceding claims, wherein an inverting input of said operational amplifier is connected via a first resistor to its output, and to earth via a second resistor which is substantially equal in value to the first resistor.

5. A convertor according to any one of the preceding claims, wherein the output of said comparator is connected to the base of a switching transistor having its emittercollector path connected across said integration capacitor.

6. A convertor according to any one of the preceding claims, wherein said comparator is a further operationai amplifier having a non-inverting input as its said first input and an inverting input as its said second input.

7. A convertor according to any one of the preceding claims. and comprising an input for said reference signal comprising a terminal connected to earth.

8. A convertor according to any one of the preceding claims, wherein a control path from the output of said comparator to said integration capacitor includes a flipflop having a reset input connected to the output of said comparator and an output coupled to control said integration capacitor, wherein a dynamic input of the flip-flop is available to receive a pulse train of variable frequency, and its other output is connected to the input of a low-pass filter from the output of which can be taken a voltage proportional to the product of said quotient with the frequency of said pulse train.

9. A dividing voltage-frequency convertor substantially as hereinbefore described with reference to Figure 1, or Figure 1 as modified in accordance with Figure 2, of the accompanying drawing.