GB1520486A - Memory module for data processing system - Google Patents
Memory module for data processing systemInfo
- Publication number
- GB1520486A GB1520486A GB21378A GB21378A GB1520486A GB 1520486 A GB1520486 A GB 1520486A GB 21378 A GB21378 A GB 21378A GB 21378 A GB21378 A GB 21378A GB 1520486 A GB1520486 A GB 1520486A
- Authority
- GB
- United Kingdom
- Prior art keywords
- module
- signal
- memory
- memory module
- data processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Abstract
1520486 Memory control DATA GENERAL CORP 23 Sept 1975 [25 Sept 1974] 00213/78 Divided out of 1520484 Heading G4A A memory module suitable for use in the overlapped access system disclosed in the parent application includes logic which provides an address select signal in response to an address for that module and a first control signal (MC1) signifying a request for that module to start an operation, generates a busy signal while operating, and provides a start memory signal in response to the address select signal only if the module is not busy and a second control signal (MC2) does not request that the module be prevented from starting operation. Two other control signals (MC3, MG4) in combination define the type of operation to be performed by the memory.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US50915974A | 1974-09-25 | 1974-09-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1520486A true GB1520486A (en) | 1978-08-09 |
Family
ID=24025532
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB21378A Expired GB1520486A (en) | 1974-09-25 | 1975-09-23 | Memory module for data processing system |
GB3900775A Expired GB1520484A (en) | 1974-09-25 | 1975-09-23 | Data processing system |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB3900775A Expired GB1520484A (en) | 1974-09-25 | 1975-09-23 | Data processing system |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS5151244A (en) |
AU (1) | AU497876B2 (en) |
CA (1) | CA1051121A (en) |
DE (1) | DE2542102C2 (en) |
GB (2) | GB1520486A (en) |
NL (1) | NL7511288A (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2922540C2 (en) * | 1978-06-02 | 1985-10-24 | Hitachi, Ltd., Tokio/Tokyo | Data processing system |
DE2939412C2 (en) * | 1979-09-28 | 1983-11-17 | Siemens AG, 1000 Berlin und 8000 München | Circuit arrangement for addressing data for read and write access in a data processing system |
US4321667A (en) * | 1979-10-31 | 1982-03-23 | International Business Machines Corp. | Add-on programs with code verification and control |
US5111530A (en) * | 1988-11-04 | 1992-05-05 | Sony Corporation | Digital audio signal generating apparatus |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US26087A (en) * | 1859-11-15 | Improvement in fastening metal hoops on cotton-bales | ||
GB888732A (en) * | 1959-12-30 | |||
JPS4828583A (en) * | 1972-03-24 | 1973-04-16 | ||
US3821709A (en) * | 1972-10-05 | 1974-06-28 | Honeywell Inf Systems | Memory storage sequencer |
US3812473A (en) * | 1972-11-24 | 1974-05-21 | Ibm | Storage system with conflict-free multiple simultaneous access |
-
1975
- 1975-09-19 CA CA235,866A patent/CA1051121A/en not_active Expired
- 1975-09-20 DE DE19752542102 patent/DE2542102C2/en not_active Expired
- 1975-09-23 AU AU85111/75A patent/AU497876B2/en not_active Expired
- 1975-09-23 GB GB21378A patent/GB1520486A/en not_active Expired
- 1975-09-23 GB GB3900775A patent/GB1520484A/en not_active Expired
- 1975-09-25 JP JP11594575A patent/JPS5151244A/en active Granted
- 1975-09-25 NL NL7511288A patent/NL7511288A/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
AU497876B2 (en) | 1979-01-18 |
GB1520484A (en) | 1978-08-09 |
JPS5731176B2 (en) | 1982-07-02 |
CA1051121A (en) | 1979-03-20 |
DE2542102C2 (en) | 1982-10-28 |
JPS5151244A (en) | 1976-05-06 |
NL7511288A (en) | 1976-03-29 |
DE2542102A1 (en) | 1976-04-08 |
AU8511175A (en) | 1977-03-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19940923 |