GB1498672A - Monitoring device for a signal transmission system - Google Patents

Abstract

1498672 Measuring voltage VEREINIGTE FLUGTECHNISCHE WERKE-FOKKER GmbH 7 April 1975 [5 April 1974] 14214/75 Heading G1U A monitoring device for a transmission system having a plurality of channels nominally carrying the same information comprises a number of comparators connected to every possible combination of pairs of channels and providing outputs whenever the difference therebetween exceeds a specified level to operate devices to block the faulty channel, wherein the comparators re-connect any blocked channel if the fault lasts for less than a predetermined time. Comparator circuit, Fig. 2 The input circuit 56 connects the input signals U E1 , U E2 to two operational amplifiers 50, 51 such that any difference between them greater than a level determined by the voltage at the tapping point of the voltage divider 53 connected to the inverting inputs causes a positive voltage to immediately turn on transistor 63 via either diode 62, 69. This causes a low input to NAND gate 60, providing a high level 'fault' output, if the excessive difference disappears after a short time, the output reverts to a low level. However if the amplifier output lasts long enough to charge one of capacitors 64, 70 to a high enough level, thyristor 66 is fired providing a low signal to the other NAND gate input. Even if the difference now returns to zero, the thyristor continues to conduct, storing the 'fault' signal until a voltage is applied to the clear input. This turns on transistor 68, shorting the thyristor current, reducing it below its holding value and the thyristor becomes blocked. Monitor system, Fig. 1 Each information channel E 1 -E 4 in e.g. a flight control system is passed via summing amplifiers V 1 -V 4 and gates S 11 -S 43 to a combining network R 1 -R 16 which produces four signals A 1 -A 4 representing the arithmetic mean of the input signals E 1 -E 4 . Each amplifier V 1 -V 4 output is compared with each other output in six comparators M 1 -M 6 of the type shown in Fig. 1. Groups of AND gates e.g. G 11 -G 13 or G 21 -G 23 determine from the comparator outputs which channel is faulty and operate respective switches e.g. S 11 -S 13 to disconnect that channel, ensuring that the mean signals A 1 -A 4 are formed only from valid information. Associated with each de-coding group e.g. G 11 -G 13 is an OR gate e.g. G 14 which passes any single fault signal to a further OR gate G 38 (also receiving signals from all the other de-coding groups) to turn off a transistor, releasing a relay RL 1 and completing a circuit to a fault indicator L 1 . If all three de-coding gates indicate a fault i.e. the fault is in the information channel rather than a failure in one part of the monitor system, an AND gate e.g. G 15 provides a high signal to a group of NAND gates G 16 -G 37 . Since only one fault is so far detected the outputs of these gates are still high. If a second channel fails, the relevant de-coding group will block that channel, a further signal will be sent to gate G 38 as well as gates G 39 and G48, G 46 and G 47 which release two further relays RL 21 , RL22 completing circuits to two indicator lights L 2 . At the occurrence of the second fault, one gate in each of the remaining two de-coder groups will also indicate a fault and the associated switches in the non- faulty channels will begin to respond. However, a further signal is sent via e.g. AND gate G 25 to the gates G 1 6 -G 37 which determine which two channels are faulty and block the incorrectly indicating gates e.g. G 31 , G 41 . Since the gates respond more quickly than the switches, the non-faulty channels are not blocked. Facilities are provided for inserting test signals via the summing amplifiers V 1 -V 4 and monitoring the de-coder group responses as well as the relay contact changes.