GB1482629A - Tone detectors - Google Patents

Abstract

1482629 Tone detector TREND COMMUNICATIONS Ltd and L F LIND 23 Dec 1974 [2 Oct 1973] 45877/73 Heading G4H A tone detector comprises means for generating a tone whose frequency is the same as that to be detected and which is not 90 degrees out of phase therewith; this signal is combined with an input signal and the resulting signal is integrated for a predetermined time period related to the frequency to be detected, the integrated signal then being analysed to determine whether the input signal contained the required frequency. In the embodiment of Fig. 1, two signal generators 10, 11 are used (sin w 1 t, cos w 1 t) so that one at least will not be 90 degrees out of phase with the input signal A. Each generated signal passes through a multiplier 14/15, an integrator 16/17 and a device 18/19 which determines the absolute magnitude of the integrated signal, before being fed to a combiner 20 which either selects the greater of the two values or calculates the square root of the sum of their squares. A discriminator then compares the output from 20 with two threshold levels, the lower of which exceeds the highest possible output from 20 when signal A is not the desired frequency and the upper of which is lower than the lowest output from 20 when signal A is 45 degrees out of phase with the outputs from both 10 and 11 and when A is the desired frequency. The output from 20 increases indefinitely when A is the desired frequency, but can be made very small when the desired frequency is absent by suitable choice of the period of integration. When the output from 20 is higher (lower) then the upper (lower) threshold the tone is indicated as being present (absent), and when it falls between them a further indication is given (e.g. lighting a warning indicator, or supplyng A for a second analysis). The apparatus may be used to indicate the presence of any one of a "linear array" of tones (each spaced from the next adjacent tones by an equal frequency). In the embodiment of Fig. 6 the input signal A is amplified and clipped, then combined with a pulse signal B in an EXOR gate 30, the output from which is fed via a second gate 31 to a counter 32 which counts clock pulses and acts as an absolute-magnitude integrator. A flip-flop 39 and a monostable 41 are provided to rectify the count when this goes below 0 (a "borrow" output on a count of 99 from the tens section 34 clocks 39 when 41 is caused to reset the counter to a count of one), flip-flop 39 controlling gate 31 so as to direct the clock pulses to an "up" or "down" NAND gate 37 or 38 respectively. Signal B may be obtained from a high frequency source via a counter acting as a frequency divider. The counting pulse rate may be given a sine "taper.'.