GB1418498A - Integrated circuit - Google Patents

Integrated circuit

Info

Publication number
GB1418498A
GB1418498A GB4702272A GB4702272A GB1418498A GB 1418498 A GB1418498 A GB 1418498A GB 4702272 A GB4702272 A GB 4702272A GB 4702272 A GB4702272 A GB 4702272A GB 1418498 A GB1418498 A GB 1418498A
Authority
GB
United Kingdom
Prior art keywords
ground
mos
devices
oct
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4702272A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB4702272A priority Critical patent/GB1418498A/en
Priority to DE19732348996 priority patent/DE2348996A1/de
Priority to FR7336157A priority patent/FR2203174B3/fr
Priority to JP48114628A priority patent/JPS4974889A/ja
Publication of GB1418498A publication Critical patent/GB1418498A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Shift Register Type Memory (AREA)
  • Static Random-Access Memory (AREA)
GB4702272A 1972-10-12 1972-10-12 Integrated circuit Expired GB1418498A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB4702272A GB1418498A (en) 1972-10-12 1972-10-12 Integrated circuit
DE19732348996 DE2348996A1 (de) 1972-10-12 1973-09-28 Integrierte festkoerperschaltung mit einer mehrzahl von mos-bauelementen
FR7336157A FR2203174B3 (xx) 1972-10-12 1973-10-10
JP48114628A JPS4974889A (xx) 1972-10-12 1973-10-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB4702272A GB1418498A (en) 1972-10-12 1972-10-12 Integrated circuit

Publications (1)

Publication Number Publication Date
GB1418498A true GB1418498A (en) 1975-12-24

Family

ID=10443426

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4702272A Expired GB1418498A (en) 1972-10-12 1972-10-12 Integrated circuit

Country Status (4)

Country Link
JP (1) JPS4974889A (xx)
DE (1) DE2348996A1 (xx)
FR (1) FR2203174B3 (xx)
GB (1) GB1418498A (xx)

Also Published As

Publication number Publication date
JPS4974889A (xx) 1974-07-19
FR2203174A1 (xx) 1974-05-10
DE2348996A1 (de) 1974-04-25
FR2203174B3 (xx) 1976-09-03

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees