GB1413655A - Electrical signal processing apparatus - Google Patents

Abstract

1413655 Calculating roots ROSEMOUNT ENG CO Ltd 5 Feb 1973 [14 Feb 1972] 6750/72 Heading G4G A circuit for yielding the square root of an analogue input V 1 comprises a high-gain amplifier with a feedback loop incorporating control means to effect two successive multiplications by the same factor M of a reference signal V 2 whereby the feedback signal M<SP>2</SP>V 2 tends to equal the input signal V 1 and the output V 0 of the first control means is equal to MV 2 and is thus proportional to the root of V 1 . As shown, the amplifier 2 is in the form of a high-gain comparator to which input V 1 is applied and with output applied to one of the logic inputs of a JK flip-flop 4 to the other logic input of which is applied a constant signal. If a clock pulse input f 1 is applied to the flip-flop, the output will be in the form of constant-duration pulses at a frequency f 0 whose maximum value is f 1 /2. This signal and its inverse are applied to switching circuits 11, 13 and 12, 14 which operate successively on reference input signal V 2 to produce, after averaging, successive output signals (f 0 /f 1 ).V 2 and (f 0 /f 1 )<SP>2</SP>.V 2 . The second output is fed to the comparator 2 and tends to equal V 1 . Thus, the output V 0 of the buffer amplifier 19 between the switching circuits is proportional to the root of V 1 . By providing further switching circuits, higher-order roots may be obtained. The JK flip-flop may be replaced by a D-type flip-flop (Fig. 2, not shown) or, if the frequency f 0 is not required, the output of the comparator may be fed to a Schmidt trigger circuit. Another form of analogue to pulse-frequency converter which may be used comprises a digital counter or shift register with a recirculatory loop (Fig. 6, not shown).