GB1409184A - Data transmission systems - Google Patents
Data transmission systemsInfo
- Publication number
- GB1409184A GB1409184A GB4521873A GB4521873A GB1409184A GB 1409184 A GB1409184 A GB 1409184A GB 4521873 A GB4521873 A GB 4521873A GB 4521873 A GB4521873 A GB 4521873A GB 1409184 A GB1409184 A GB 1409184A
- Authority
- GB
- United Kingdom
- Prior art keywords
- store
- blocks
- block
- control
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
- H04L5/1423—Two-way operation using the same type of signal, i.e. duplex for simultaneous baseband signals
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
1409184 Digital transmission: synchronizing STANDARD TELEPHONES & CABLES Ltd 27 Sept 1973 45218/73 Heading H4P In a duplex system having separate go and return channels the detection of an error in either direction causes retransmission cycles in both directions. If a predetermined number of data blocks in a given direction are found corrupted this is interpreted as a loss of block synchronization, and on detection causes cessation of transmission and an exchange of synchronization signal patterns until block synchronization is regained. When one of the stations detects resynchronization it sends a single special return-to-data signal block to the other station, and on reception of the special block the other station returns a single returnto-data block, whereafter data transmission is resumed. Timing distributer 1 enables gates G1-G3 during transmission of information blocks, G4 during request RQ and reception correct OK bit, and G5 during transmission of parity bits. Data store 3 has capacity for N information bits and auxiliary re-transmission store 4 is divided into two N bit parts. Main and auxiliary stores step together the latter stepping one stage per block transmitted. In the auxiliary stores a data block is indicated by 0/0, sync. block as 1/0 and start as 1/1. For normal transmission sync. and start control 5 inserts a series of 0's in both parts of store 4 which opens gate G20 enabling G6; G3 opens passing data to line also to store 3. G4 opens admitting RQ/OK bit from store 6 which together with information bits pass to line via G6 also into parity generator 7. During re-transmission, gates G1, G15, G16 open connecting inputs and outputs of stores 3, 4. As before G20 enables G6 and bits from store 3 are transmitted to line followed by RQ/OK and parity bits. When receiving, timing distributer 7 enables G8-G10, passing information bits to store 8, RQ/OK to store 9 and all bits to check unit 10. If parity is correct unit 11 passes information bits to output through G7. If incorrect, control 12 maintains G7 closed for the following N- 1 blocks also signals control 5 so that should one of these blocks be a "start of data" (St) this would be ignored. Unit 11 also signals cycle control 2 which inserts RQ in store 6 for transmission when G4 opens, control 2 also enabling G1, G15, G16 for next N blocks. Since both parts of store 4 contain 0's, G6 remains open and blocks held in store 3 are transmitted to line. Control 2 inserts OK in 6 for remaining N-1 blocks. Unit 12 connected to counter 13 counts the number of consecutive re-transmission cycles requested by 12. When the count reaches a predetermined number at which it is assumed that sync. is lost, C13 signals control 5 which initiates block sync. During this phase control 5 enables G13 opening G2 which holds a control 2 in a non- retransmission condition; control 2 also supplies an OK to store 6. Unit 14 through G2 supplies the "information bit" content of a sync. block also primes G17 which opens when an enabling signal is received from distributer 1; this occurs when a determined number of parity bits are inserted to render blocks non-checking these being transmitted via G11. At the receiver, detector 15 examines the whole of the incoming bits stream until it locates the sync. pattern when gates G8-G10 are opened at correct times; distributer 7 also supply a signal to detector 15 restricting its subsequent examination to that part of blocks occupied by sync. patterns. Sync. blocks are then sent with RQ/OK bit determined by control 2 acting under control of unit 11. Counter 16 steps for each checking block received and resets to 0 for each non-checking block. When it reaches (N-1) control 5 is enabled causing generator 14 to transmit a "starter data block" also inserts a 1 in store 4. Signals are removed from S, St outputs and applied to D allowing data transmission to proceed. At the receiver, control 5 detects a St block having received an OK from parity check 10 but no signal from 15. When data transmission is resumed, store 3 will contain data which must be transmitted before any further data is accepted. Counter 17 counts number of blocks extracted, ignoring re-transmissions. Before N is reached G18, G1 open and more blocks are drawn from store 3. When N is reached G18 shuts and G19 opens drawing fresh data from the input line. As described a whole message is repeated but this is not necessary if blocks are numbered for identification hence recommencement can be from commencement of faulty blocks. Minor modifications are described in the Specification.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB4521873A GB1409184A (en) | 1973-09-27 | 1973-09-27 | Data transmission systems |
ES430479A ES430479A1 (en) | 1973-09-27 | 1974-09-27 | Data transmission systems |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB4521873A GB1409184A (en) | 1973-09-27 | 1973-09-27 | Data transmission systems |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1409184A true GB1409184A (en) | 1975-10-08 |
Family
ID=10436348
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB4521873A Expired GB1409184A (en) | 1973-09-27 | 1973-09-27 | Data transmission systems |
Country Status (2)
Country | Link |
---|---|
ES (1) | ES430479A1 (en) |
GB (1) | GB1409184A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4425645A (en) | 1981-10-15 | 1984-01-10 | Sri International | Digital data transmission with parity bit word lock-on |
US4894498A (en) * | 1987-06-04 | 1990-01-16 | Alps Electric Co., Ltd. | Push button switch having radial leads |
-
1973
- 1973-09-27 GB GB4521873A patent/GB1409184A/en not_active Expired
-
1974
- 1974-09-27 ES ES430479A patent/ES430479A1/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4425645A (en) | 1981-10-15 | 1984-01-10 | Sri International | Digital data transmission with parity bit word lock-on |
US4894498A (en) * | 1987-06-04 | 1990-01-16 | Alps Electric Co., Ltd. | Push button switch having radial leads |
Also Published As
Publication number | Publication date |
---|---|
ES430479A1 (en) | 1976-10-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PLNP | Patent lapsed through nonpayment of renewal fees |