GB1394949A - Circuit arrangement for the transmission of message signals by means of delta pulse modulation - Google Patents

Abstract

1394949 Delta modulators LICENTIA PATENT-VERWALTUNGS GmbH 16 March 1973 [16 March 1972] 12700/73 Heading G4H A delta modulator includes a first companding device to alter the delta step size in dependence upon the immediately previous few bits produced, and a second compander to modify the output of the first compander in accordance with the envelope of the input signal. As shown, a speech signal E is filtered and sampled at 11 and applied to a comparator 12 which, via 13, provides a positive or negative pulse as the result of the comparison with the reconstituted signal at the other comparator input, which pulse is delayed by two flip-flops 15, 16 and emitted at 17. The outputs of the flip-flops are taken to a logic unit 18 of a first compander K1 where if 2 consecutive pulses of the same polarity occur, a pulse 9 is emitted to increment by 1 a counter 19, and if two consecutive pairs of dissimilar pulses occur, pulses K are emitted to decrement the counter 19 by 2. The binary coded outputs of the counter are taken to a 1-out-of-8 decoder 20 which causes a constant voltage supply to be connected to one end of a particular one of resistors 1-8, the magnitude of each of which is V2 times and 1/V2 times that of its neighbours, thereby producing a voltage on the line 22 indicative of the output of counter 19. An integrator 23 connected to the highest order output of decoder 20 and having its amplified output also connected to the line 22 forms the second compander V2. The integrator 23 receives an input from the constant voltage supply when and for as long as the counter is at its maximum state. Time constants both of charging and discharging are suitably chosen and the output of the integrator modifies the voltage at 22 in accordance with the envelope of the incoming signal E. At each sampling instant a circuit 25 is enabled to modify the charge on integrator 27 the output of which forms the input to the second terminal of comparator 12, in accordance with the voltage at line 22.