GB1388387A - Manufacture of semiconductor devices - Google Patents

Manufacture of semiconductor devices

Info

Publication number
GB1388387A
GB1388387A GB913671A GB913671A GB1388387A GB 1388387 A GB1388387 A GB 1388387A GB 913671 A GB913671 A GB 913671A GB 913671 A GB913671 A GB 913671A GB 1388387 A GB1388387 A GB 1388387A
Authority
GB
United Kingdom
Prior art keywords
layer
substrate
implantation
formation
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB913671A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Smiths Group PLC
Original Assignee
Smiths Group PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Smiths Group PLC filed Critical Smiths Group PLC
Priority to GB913671A priority Critical patent/GB1388387A/en
Priority to IT49460/72A priority patent/IT952552B/en
Priority to FR7212329A priority patent/FR2132778A1/fr
Priority to DE19722217121 priority patent/DE2217121A1/en
Publication of GB1388387A publication Critical patent/GB1388387A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

1388387 lon-implantation into semi-conductors SMITHS INDUSTRIES Ltd 10 April 1972 [8 April 1971] 9136/71 Heading H1K Regions in a semi-conductor substrate 6 to which ohmic contact is to be made are formed by ion-implantation both through a window in an insulating layer 8 on the substrate 6 and through the part of the layer 8 which completely surrounds the window. Monoenergetic ions are used; this gives a higher surface doping level to the peripheral part of the region. Fig. 2 shows that part of an integrated circuit which contains an IGFET T and a resistor R. Boron ions are implanted into a (100) orientated N-type silicon substrate 6. Source and drain regions 3, 4 and resistor terminal regions 3, 4 are formed by the above process, the insulating layer 8 comprising a lower layer of thermal silicon oxide and an upper layer of silicon nitride, an aluminium layer (22, not present at the stage shown) having been used as an implantation mask. The shallow extensions 11, 12 of the source and drain regions are formed in a separate gateregistered implantation step; the channel region 13 of the resistor may be formed at the same time or at an earlier stage. The aluminium metallization used to form the gate electrode 9 and connections 14 is taken over thick silicon oxide walls 16 between devices to avoid the formation of parasitic channels. The many integrated circuits formed on the substrate are tested, separated and mounted on headers. Since the first process is the formation of insulating layer 8 and since it remains throughout the process and in the completed device, the structure is usefully tested for faults (such as pinholes) immediately after the formation of the layer 8.
GB913671A 1971-04-08 1971-04-08 Manufacture of semiconductor devices Expired GB1388387A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB913671A GB1388387A (en) 1971-04-08 1971-04-08 Manufacture of semiconductor devices
IT49460/72A IT952552B (en) 1971-04-08 1972-04-07 IMPROVEMENT IN PROCEDURES FOR THE PRODUCTION OF SEMICONDUCTOR DEVICES
FR7212329A FR2132778A1 (en) 1971-04-08 1972-04-07
DE19722217121 DE2217121A1 (en) 1971-04-08 1972-04-10 Process for the production of semiconductor components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB913671A GB1388387A (en) 1971-04-08 1971-04-08 Manufacture of semiconductor devices

Publications (1)

Publication Number Publication Date
GB1388387A true GB1388387A (en) 1975-03-26

Family

ID=9866068

Family Applications (1)

Application Number Title Priority Date Filing Date
GB913671A Expired GB1388387A (en) 1971-04-08 1971-04-08 Manufacture of semiconductor devices

Country Status (4)

Country Link
DE (1) DE2217121A1 (en)
FR (1) FR2132778A1 (en)
GB (1) GB1388387A (en)
IT (1) IT952552B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2183905A (en) * 1985-11-18 1987-06-10 Plessey Co Plc Semiconductor device manufacture

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2183905A (en) * 1985-11-18 1987-06-10 Plessey Co Plc Semiconductor device manufacture
GB2183905B (en) * 1985-11-18 1989-10-04 Plessey Co Plc Method of semiconductor device manufacture

Also Published As

Publication number Publication date
DE2217121A1 (en) 1972-11-02
FR2132778A1 (en) 1972-11-24
IT952552B (en) 1973-07-30

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees