GB1384818A - Electrical capacitive storage cells - Google Patents

Electrical capacitive storage cells

Info

Publication number
GB1384818A
GB1384818A GB4322272A GB4322272A GB1384818A GB 1384818 A GB1384818 A GB 1384818A GB 4322272 A GB4322272 A GB 4322272A GB 4322272 A GB4322272 A GB 4322272A GB 1384818 A GB1384818 A GB 1384818A
Authority
GB
United Kingdom
Prior art keywords
cells
cell
substrate
gate
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4322272A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Co Ltd
Original Assignee
Plessey Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Co Ltd filed Critical Plessey Co Ltd
Priority to GB4322272A priority Critical patent/GB1384818A/en
Publication of GB1384818A publication Critical patent/GB1384818A/en
Priority to HK153/76*UA priority patent/HK15376A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/282Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements with charge storage in a depletion layer, i.e. charge coupled devices [CCD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors with potential-jump barrier or surface barrier
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices

Abstract

1384818 Semi-conductor devices PLESSEY CO Ltd 8 Aug 1973 [18 Sept 1972] 43222/72 Heading H1K A plurality of capacitative storage cells are formed in a substrate 1 of a given conductivity type by diffused regions 2 of the opposite conductivity type and overlying capacitative electrodes 5. A magnetic field or an electric field if applied to the substrate to provide a bias such that minority carriers injected from one diffusion move to a particular neighbouring diffusion. The arrangement shown is a shift register (which in practice would have more storage cells) in which the bias is provided by a voltage source connected across contacts 7, 8. Information fed to one of the terminals 6 is shifted by clock pulses applied alternately to electrodes 5 such that when the potential applied to an electrode 5 is high and stored information is non-zero the corresponding PN junction 3 becomes forward biased and injects carriers in a number equivalent to the stored information into the substrate and these move in the bias field to be collected by the next diffusion, the electrode 5 of which is at that time at low potential. Losses in the substrate are reduced by the carrierreflecting NN<+> junction. The stored information, which may be in digital or analogue form, appears at the other terminal 6 and may be presented in electrical or optical form. Radiation could instead be used to supply the input information. Systems employing 3 clock pulse sources could replace the two pulse systems described, and a rectangular matrix of cells could use two electric fields, or one electric and one magnetic, to provide the perpendicular biases for the rows and columns. Fig. 5 shows a schematic arrangement for logic circuitry with three "first" cells A and a single "final" cell C. Stored charge from the A cells may be moved simultaneously or sequentially to the C cell. The logic operation performed depends on the relative capacitances of the cells. If all four cells are equivalent, the device is a 3 input OR gate; if cell C has twice the capacitance of each A cell the device is a 2-out-of-3-gate; and if cell C has three times the capacitance of each A cell, the device is an AND gate.
GB4322272A 1972-09-18 1972-09-18 Electrical capacitive storage cells Expired GB1384818A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB4322272A GB1384818A (en) 1972-09-18 1972-09-18 Electrical capacitive storage cells
HK153/76*UA HK15376A (en) 1972-09-18 1976-03-18 Electrical capacitive storage cells

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB4322272A GB1384818A (en) 1972-09-18 1972-09-18 Electrical capacitive storage cells

Publications (1)

Publication Number Publication Date
GB1384818A true GB1384818A (en) 1975-02-26

Family

ID=10427808

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4322272A Expired GB1384818A (en) 1972-09-18 1972-09-18 Electrical capacitive storage cells

Country Status (2)

Country Link
GB (1) GB1384818A (en)
HK (1) HK15376A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2496343A1 (en) * 1980-12-12 1982-06-18 Clarion Co Ltd VARIABLE CAPACITOR

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2496343A1 (en) * 1980-12-12 1982-06-18 Clarion Co Ltd VARIABLE CAPACITOR

Also Published As

Publication number Publication date
HK15376A (en) 1976-03-26

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees