GB1378522A - Parrern control system for controlling textile machinery - Google Patents

Abstract

1378522 Copying by scanning LOUIS NEWMARK Ltd 18 Dec 1972 [17 Dec 1971] 58633/71 Heading H4F A knitting machine is controlled by binary codes stored in a memory 10, Fig. 1, which codes represent a knitting pattern. An original 2, Figs. 1 and 3, to which the codes in memory 10 correspond, e.g. an artist's drawing, is viewed by a television camera 1 the output of which is displayed on the screen of a television monitor 5 in either monochrome or colour, as shown in Fig. 3. The codes from memory 10 are read out and are also displayed on the screen of monitor 5, either superimposed on, or in place of, the displayed output of camera 1. The codes may be displayed in colour, or in the form of different symbols, as shown in Fig. 3. To enter a new pattern into the memory 10, the image of the original is viewed on the television screen, and individual codes are selected using a keyboard 121, codes being written into memory 10 during each field flyback period of the monitor 5, and the codes in the memory 10 being read out and displayed during the following field scan, a marker also being displayed to indicate the code which was last entered in the memory, the codes for the bottom line of the pattern being entered first. The portion of the original 2 viewed may be varied by movement of easel 3 carrying the original in either of two directions, 3b, 3c, Fig. 1, the size of the displayed image being varied by moving the camera 1 on runners 4a, or by use of a zoom lens. The aspect ratio of the displayed image of the original may be varied by altering the amplitude of the vertical scanning signal of camera 1. When information is being read out of memory 10, addresses in the memory 10 are sequentially derived using horizontal and vertical counters (141, 151, Fig. 7,notshown)thehorizontal counter counting the pulses of signal bursts, a burst occuring during each line and each burst containing 128 pulses (when each pattern line contains 128 elements), and the vertical counter counting a signal at a third of the line frequency (when each pattern line is displayed on three lines per field). The address from which read out takes place may be altered by applying the output of a shift generator to the up or down input of a horizontal shift counter or a vertical shift counter, the counts in the horizontal and vertical counters being set equal to the counts in the respective shift counters at the end of each line. The read out codes for each line are fed at a slow rate to one of a pair of shift registers (51, 52, Fig. 4, not shown), the other of which contains the codes for the previous line, which are repeatedly read out at the appropriate rate for display. The first lines of the pattern may be omitted by altering the timing of a multivibrator (48, Fig. 4, not shown) feeding horizontal sync. pulses to read out the codes in the full shift register, and the orthogonality of the display may be altered by controlling the timings of these horizontal sync. pulses. Any line of the memorized pattern may be repeated in a reversed manner by actuation of an appropriate switch. When information is being written in to memory 10, one of six keys is actuated for each code, the resulting code being temporarily stored until the following field flyback period, a further key being provided to allow continued repetition of this code as long as the code key and repetition key are actuated, this also causing repeated stepping of the address in the memory which is receiving the code. The memory address is incremented after each code has been written in, and may be manually incremented by means of switches which pass pulses to the up or down inputs of respective horizontal and vertical counters (201, 202, not shown). Any address may be stored in two stores corresponding to the two counters, the counters being reset, when desired, to these stored addresses. A marker is displayed on the screen when the address from which information is being read for display is identical with the address indicated by the counters controlling the position of writing in the memory 10.