GB1363300A - Pulse counting system - Google Patents

Abstract

1363300 Measuring displacement ALLMANNA SVENSKA ELEKTRISKA AB 6 Dec 1971 [7 Dec 1970] 56475/71 Heading G4H From phase displaced pulse trains A, B (Fig. 1) representing the amount and direction of movement of a member, logic circuitry derives signals for incrementing or decrementing a counter R. As described, the pulses in the trains A, B are read into memory circuits V1, V3 at each clock pulse C1 from a generator CPG, the previous contents of these circuits V1, V3 being transferred to further memory circuits V2, V4. The output signals from all the circuits V1-V4 and their complements are compared in AND gates U1-U4, N1-N4, one of the first set giving a signal (when the member moves one increment in one direction) via an OR gate U5 and an AND gate U6 (primed by clock pulses C2 delayed from the clock pulses C1) to input RU of the counter R so that a pulse from OR gate O increments the counter. One of the second set N1-N4 similarly gives a signal when the member moves one increment in the other direction to decrement the counter. Since the clock pulses are short in relation to the pulses of the pulse trains A, B, errors due to disturbances in the pulse trains are reduced. If a disturbance occurs during a clock pulse, the count is corrected at the subsequent pulse. The pulses are derived from a disc (Fig. 3, not shown) having two tracks each comprising two slotted members extending over 90 degrees. The sets of the two tracks are phase displaced by 45 degrees from each other and sensed by two photo resistors, photo diodes or photo transistors. Modification.-One of the second memory stages V2 or V4 and some of the AND gates U1-U4, V1-V4 may be omitted.