GB1351894A - Method and instrument for the measurement and digital display of direct durrent electric signals - Google Patents
Method and instrument for the measurement and digital display of direct durrent electric signalsInfo
- Publication number
- GB1351894A GB1351894A GB1322772A GB1322772A GB1351894A GB 1351894 A GB1351894 A GB 1351894A GB 1322772 A GB1322772 A GB 1322772A GB 1322772 A GB1322772 A GB 1322772A GB 1351894 A GB1351894 A GB 1351894A
- Authority
- GB
- United Kingdom
- Prior art keywords
- integrator
- zero
- counter
- unknown
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 title abstract 2
- 238000005259 measurement Methods 0.000 title 1
- 230000010354 integration Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
1351894 A/D converters LA TELEMECANIQUE ELECTRIQUE 21 March 1972 [25 March 1971] 13227/72 Heading G4H A dual-ramp A/D converter is adapted to perform an initial charge-discharge-charge sequence to compensate for errors present in the unknown voltage presented to the integrator owing to the components of the converter itself. The apparatus comprises a reference input 1 and amplifier 3 and an unknown input 2 which is connected via switch 4 to a second amplifier 6, both inputs being presented to a second switching device 5 which provides the input to a capacitor-type integrator 7 having its output connected with a zero-detector 8 which is connected to two logic circuits 12, 13 which operate on a counter 10, store 14 and display 15. A clock-pulse source 9 is provided for the counter 10 and a third logic circuit 11 is provided to operate the switching devices 4, 5 in response to various zero-count conditions at 10. In operation and with the counter 10 registering zero, the switches 4, 5 are held at positions F2, F3 respectively to connect the integrator 7 to ground, and the counter counts to its maximum during which time the integrator 7 integrates voltages due to the errors in all components 4-7. At the maximum count, the counter 10 resets to zero and the device 11 causes switches 4, 5 to take positions F1 and F4 respectively and so a reference voltage is applied to the integrator 7 to discharge it, the device 8 via device 12 causing the counter 10 to reverse its direction at the zero output point of the integrator to count back to zero, at which time the switch 5 is moved to position F3. At this point, the integrator 7 is charged with the integral over time T of all error voltages affecting the unknown input 2, and with a reverse polarity to the unknown voltage. The last switching procedure connects the unknown voltage, together with any errors present, with the integrator 7 and the integration proceeds for a further time T, the time that the counter requires to count from zero to its maximum. When this resets once more, switch 5 switches back to F4 to cause the discharge of the integrator back to zero. When zero is reached, the device 8 via device 13 causes a store 14 and a display 15 to operate to give an indication of the unknown voltage value. The unknown input may be from a strain gauge bridge.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7110532A FR2129988B1 (en) | 1971-03-25 | 1971-03-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1351894A true GB1351894A (en) | 1974-05-01 |
Family
ID=9074108
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1322772A Expired GB1351894A (en) | 1971-03-25 | 1972-03-21 | Method and instrument for the measurement and digital display of direct durrent electric signals |
Country Status (8)
Country | Link |
---|---|
BE (1) | BE780921A (en) |
CH (1) | CH572624A5 (en) |
DE (1) | DE2214602C3 (en) |
FR (1) | FR2129988B1 (en) |
GB (1) | GB1351894A (en) |
IT (1) | IT950485B (en) |
NL (1) | NL7203952A (en) |
SE (1) | SE376981B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE29992E (en) | 1973-07-19 | 1979-05-08 | Analog Devices, Incorporated | Integrating analog-to-digital converter having digitally-derived offset error compensation and bipolar operation without zero discontinuity |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1190631A (en) * | 1966-10-21 | 1970-05-06 | Gen Electric | Error Correction Circuits for Analog Signal Processing. |
GB1211755A (en) * | 1967-03-20 | 1970-11-11 | Westinghouse Electric Corp | Analog-to-digital conversion system |
US3566397A (en) * | 1969-01-15 | 1971-02-23 | Ibm | Dual slope analog to digital converter |
-
1971
- 1971-03-25 FR FR7110532A patent/FR2129988B1/fr not_active Expired
-
1972
- 1972-03-20 BE BE780921A patent/BE780921A/en unknown
- 1972-03-20 SE SE7203532A patent/SE376981B/xx unknown
- 1972-03-21 GB GB1322772A patent/GB1351894A/en not_active Expired
- 1972-03-21 CH CH430372A patent/CH572624A5/xx not_active IP Right Cessation
- 1972-03-22 IT IT22239/72A patent/IT950485B/en active
- 1972-03-24 NL NL7203952A patent/NL7203952A/xx unknown
- 1972-03-25 DE DE2214602A patent/DE2214602C3/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE29992E (en) | 1973-07-19 | 1979-05-08 | Analog Devices, Incorporated | Integrating analog-to-digital converter having digitally-derived offset error compensation and bipolar operation without zero discontinuity |
Also Published As
Publication number | Publication date |
---|---|
NL7203952A (en) | 1972-09-27 |
FR2129988A1 (en) | 1972-11-03 |
SE376981B (en) | 1975-06-16 |
DE2214602A1 (en) | 1972-09-28 |
DE2214602B2 (en) | 1975-01-30 |
CH572624A5 (en) | 1976-02-13 |
DE2214602C3 (en) | 1975-09-04 |
FR2129988B1 (en) | 1974-09-27 |
IT950485B (en) | 1973-06-20 |
BE780921A (en) | 1972-07-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PLNP | Patent lapsed through nonpayment of renewal fees |