GB1349950A - Microprogramme control system - Google Patents

Abstract

1349950 Microprogram control system INTERNATIONAL BUSINESS MACHINES CORP 21 Dec 1971 59265/71 Heading G4A A microprogram control system for a data processing system deals with interrupts in microroutines, e.g. for nesting. The data processing system is a modification of Specification 1,233,484 and comprises two associative stores 10, 12, each having two I/O registers and a mask store, and a conventional magnetic core or monolithic store 14. Store 12 (the F or Function store) has a control area holding microprogram control data which controls all three stores, an ALU area holding function tables for performing arithmetic and logical functions on operands applied to the tables as the search argument of a table-lookup operation, and a key area which holds a key supplied as part of the search argument and which identifies the table to be accessed. Store 10 (the D or data store) has a register area, a register addresses area, a second operand area and a key area. The respective I/O registers are D1, D2 and F1, F2 and the processor operates serially in BCD. Operation.-An instruction is executed as a sequence of microroutines, each consisting of a loop of two or more control words. The termination of each loop is determined by a count and the key is used to search for the first word of a microroutine which contains the address of the next control word and the count associated with the microroutine. The microroutines can be nested. Sequences of microroutine keys are held in store 14 and a key identifies the first microcontrol word of a microroutine held in the F store, an incrementable count in the word together with the key being used to address the following words. Transfer of control from one microroutine to another is effected by link words held in the control area of the F store (Fig. 3, not shown). The link word causes transfer of the key and count to a dump register in the D store and a new routine is commenced. The penultimate microcontrol word of the routine recalls the data in the dump register and the last word generates all zero address data which is OR-ed with the transferred dump register contents to provide the address data for the next microcontrol word. This procedure is stated to reduce the time taken to transfer control between routines.