GB1341843A - Logic tutor - Google Patents

Logic tutor

Info

Publication number
GB1341843A
GB1341843A GB1341843DA GB1341843A GB 1341843 A GB1341843 A GB 1341843A GB 1341843D A GB1341843D A GB 1341843DA GB 1341843 A GB1341843 A GB 1341843A
Authority
GB
United Kingdom
Prior art keywords
storage
elements
storage elements
tutor
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Research Development Corp UK
Original Assignee
National Research Development Corp UK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Research Development Corp UK filed Critical National Research Development Corp UK
Publication of GB1341843A publication Critical patent/GB1341843A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09BEDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
    • G09B23/00Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes
    • G09B23/06Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics
    • G09B23/18Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism
    • G09B23/183Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits
    • G09B23/186Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits for digital electronics; for computers, e.g. microprocessors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Algebra (AREA)
  • Computational Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Analysis (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Business, Economics & Management (AREA)
  • Educational Administration (AREA)
  • Educational Technology (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

1341843 Logic tutor apparatus NATIONAL RESEARCH DEVELOPMENT CORP 19 April 1971 [19 Jan 1970] 2440/70 Headings G4C and G5G Logic tutor apparatus includes a bit-addressed storage circuit comprising a plurality of binary storage elements which may be changed to a predetermined state by the application of a predetermined bit-write signal and of coded address signals to appropriate terminals, selection means for selecting any of the storage elements of the storage circuit and changing the state of the selected element to the predetermined state, and display means for indicating at least which of the storage elements are set to one of the states. As shown (Fig. 2), the storage circuit comprises four units 47-50 each of 16 storage elements. A counter 63, clock 64 and decoder 52 enable each of the storage elements to be addressed in turn; outputs corresponding to the states of the elements appear sequentially at an OR-gate 61 for controlling the intensity of the beam of a cathode-ray rube 70, which beam is deflected by digital to analogue converter 65 so as to present a truth table, e.g. a Karnaugh Map of the elements of the storage circuit. The state of a storage element for which an address exists on lines 41-46 may be changed by holding a light pen 72 over the appropriate dot on the screen 70 and depressing a key 60. The apparatus can function with either 4 or 6 variables at input terminals 41-46. Delay circuits may be connected between input and output terminals of the circuit to facilitate study of sequential behaviour and feed back loops in logical expressions and, e.g. NAND gates may be provided for connection by a patch board as required. The display on the screen 70 may comprise dots, or alpha-numeric characters. A number of OR-gates may be provided each having the output terminals of different or different combinations of, storage circuits connected to their input terminals and switching means may also be provided to allow for signals on variable numbers of inputs to the apparatus.
GB1341843D 1971-04-19 1971-04-19 Logic tutor Expired GB1341843A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB244070 1971-04-19

Publications (1)

Publication Number Publication Date
GB1341843A true GB1341843A (en) 1973-12-25

Family

ID=9739626

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1341843D Expired GB1341843A (en) 1971-04-19 1971-04-19 Logic tutor

Country Status (1)

Country Link
GB (1) GB1341843A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2257816A (en) * 1991-07-12 1993-01-20 Inova Enterprises Limited Teaching apparatus.
FR2706212A1 (en) * 1993-06-07 1994-12-16 Zabeti Esmail System for visually displaying and, in a concrete way, studying the logical and analogue operation of a microcomputer when running

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2257816A (en) * 1991-07-12 1993-01-20 Inova Enterprises Limited Teaching apparatus.
GB2257816B (en) * 1991-07-12 1994-02-09 Inova Enterprises Limited Teaching apparatus
FR2706212A1 (en) * 1993-06-07 1994-12-16 Zabeti Esmail System for visually displaying and, in a concrete way, studying the logical and analogue operation of a microcomputer when running

Similar Documents

Publication Publication Date Title
US3678497A (en) Character generation system having bold font capability
US4028695A (en) Data terminals having interactive keyboards and displays and data processing apparatus incorporating such terminals
GB1260501A (en) Traveling message display
US3296426A (en) Computing device
ATE84165T1 (en) LOGICAL CIRCUIT WITH LINKED MULTIPORT FLIP FLOPS.
GB1101851A (en) Generalized logic circuitry
GB1473029A (en) Logic arrays
GB1581440A (en) Apparatus for displaying graphics symbols
GB1325165A (en) Display systems
GB1380570A (en) Logical circuit arrangements
US3335415A (en) Digital display
GB1341843A (en) Logic tutor
GB1281182A (en) Multi-purpose display
GB1475155A (en) Logical circuit apparatus
US4231024A (en) Device for a digital arithmetic processing apparatus
US3870897A (en) Digital circuit
US3324456A (en) Binary counter
US3962701A (en) Coded counting sequence and logic implementation thereof to drive a display pattern
US3653033A (en) Non-linear decoder with linear and non-linear ladder attenuators
US3445827A (en) Memory controlled shift register display device
EP0107687B1 (en) Display for a computer
US3681616A (en) Logic circuits
US4086588A (en) Signal generator
US3003137A (en) Binary signal storage
US3866023A (en) Apparatus and method for bidirectional shift register operation

Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee