GB1331815A - Data storage apparatus - Google Patents

Data storage apparatus

Info

Publication number
GB1331815A
GB1331815A GB2001871A GB2001871A GB1331815A GB 1331815 A GB1331815 A GB 1331815A GB 2001871 A GB2001871 A GB 2001871A GB 2001871 A GB2001871 A GB 2001871A GB 1331815 A GB1331815 A GB 1331815A
Authority
GB
United Kingdom
Prior art keywords
circuit
transistor
potential
emitter
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2001871A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1331815A publication Critical patent/GB1331815A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • H03K3/2885—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

1331815 Bi-stable circuit INTERNATIONAL BUSINESS MACHINES CORP 19 April 1971 [22 Jan 1970] 20078/71 Heading H3T [Also in Division G4] A bi-stable circuit SP1 comprises two coupled double-emitter like conductivity type transistors T1, T4 each having an emitter connected to an emitter of a respective control transistor T2, T3 and to a bit line VB1, VB2, each control transistor having a potential on its base which can be varied to write data bits into the circuit. The circuit is " read " by raising the voltage at the junction of the collector load resistors Z so that the emitter potential of the on transistor, say T1, rises and therefore causes a decrease in collector current of the emitter-coupled transistor T2 which can be measured by a sense amplifier with inputs connected between termi. nals 19. When " writing " a logical 0 into the circuit, assuming a logical 1 is stored, the potential at the base of transistor T3 is held constant and the potential at the base of transistor T2 is lowered. Lowering of the potential at the junction of the two load resistors Z then causes the state of the circuit to be changed. The bit line VB2 at the emitter of transistor T3 is restored via this transistor when the potential at the said junction is lowered. Each control transistor T2, T3 is operated by a driver circuit T5-T9 in response to signals applied to the bases of transistors T8, T9 and an enabling signal VRN to current source transistors T5, T6. The appropriate circuit SP1 is selected by a word decoding network 31 and a phase-splitting network 32. The phase splitting network causes a current-limiting resistor in series with the two load resistors Z to be by-passed by a collectoremitter path of a transistor (TC, Fig. 1, not shown) to raise the potential at said junction when reading from or writing into the circuit. Bit decoding network 33 selects via phase splitter 34, the corresponding drive circuit T5-T9.
GB2001871A 1970-01-22 1971-04-19 Data storage apparatus Expired GB1331815A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19702002708 DE2002708C3 (en) 1970-01-22 1970-01-22 Memory arrangement with bistable flip-flops

Publications (1)

Publication Number Publication Date
GB1331815A true GB1331815A (en) 1973-09-26

Family

ID=5760204

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2001871A Expired GB1331815A (en) 1970-01-22 1971-04-19 Data storage apparatus

Country Status (4)

Country Link
JP (1) JPS5139501B1 (en)
DE (1) DE2002708C3 (en)
FR (1) FR2077262B1 (en)
GB (1) GB1331815A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3736573A (en) * 1971-11-11 1973-05-29 Ibm Resistor sensing bit switch

Also Published As

Publication number Publication date
FR2077262A1 (en) 1971-10-22
DE2002708A1 (en) 1971-07-29
DE2002708B2 (en) 1978-01-19
DE2002708C3 (en) 1978-09-28
FR2077262B1 (en) 1975-04-18
JPS5139501B1 (en) 1976-10-28

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee