GB1330741A - Data processor - Google Patents

Abstract

1330741 Digital computers; fast Fourier transforms INTERNATIONAL BUSINESS MACHINES CORP 5 July 1971 [6 July 1970] 31352/71 Heading G4A A special purpose digital computer is used to evaluate fast Fourier transforms using the Cooley-Tukey algorithm (decimation in time) or the Sande-Tukey algorithm (decimation in frequency), e.g. for digital spectral analysis, filter simulation &c. The fast Fourier transform FFT is a method of computing the discrete Fourier transform DFT of a time series by sequentially combining progressively larger weighted sums of data samples so as to produce DFT's as defined by: where An is the n'th coefficient of the DFT and is almost always complex, Xj is a complex number, and W = e<SP>-2#i/n</SP>. The DFT's of the individual data samples are combined such that the occurrence times of these samples are taken into account sequentially and applied to the DFT'S of progressively larger mutually exclusive subgroups of data samples which are combined to produce the DFT of the complete series of samples. This method is stated to cause a reduction in computing time over the prior art methods. The Cooley-Tukey and Sande-Tukey algorithms are both described in detail and both require ¢N log N complex additions, subtractions and multiplications. If the prime factor corresponding to a given summation being evaluated for each of the N equations is #, then the FFT algorithm for the radix # evaluates this summation in # of the N equations at a time, hereafter termed # tuples, until this summation has been evaluated in all of the N equations. Each summation for all equations is called a stage of the FFT algorithm and since there are r nested summations in each of the N equations there are r stages. Each of the # summations in a # tuple consists of # terms containing a complex input value multiplied by a complex exponential. These # summations of # terms are called the kernal equations for radix #. # may have values 2 and 4 and the Cooley- Tukey or Sande-Tukey algorithms may be performed in radix 2, radix 2 + 4, or 4 + 2 (Figs. 6 to 13, not shown). The system.-The computation is effected by an array processor 10 (Fig. 2, not shown) connected to main storage 12 and a central processor 11. The latter may be connected to input/output units via a multiplexer. The array processor 10 accepts 1/0 instructions from processor 11 and performs its operations on data in main storage 12. It performs address indexing and counting operations, issues fetch and store requests for the input and result data, converts fixed to floating point formats and vice versa, interrupts processor 10, and performs arithmetic operations in floating point format using its own arithmetic unit. Two independent read only microprograms control the arithmetic unit and other sections of the processor 10 respectively. The arithmetic section performs the function U x X Œ Y where U is the multiplicand, X is the multiplier and Y is the augend.