GB1326626A - Apparatus and method for routing discrete telecommunication signals - Google Patents
Apparatus and method for routing discrete telecommunication signalsInfo
- Publication number
- GB1326626A GB1326626A GB4463670A GB4463670A GB1326626A GB 1326626 A GB1326626 A GB 1326626A GB 4463670 A GB4463670 A GB 4463670A GB 4463670 A GB4463670 A GB 4463670A GB 1326626 A GB1326626 A GB 1326626A
- Authority
- GB
- United Kingdom
- Prior art keywords
- highway
- highways
- sample
- location
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/06—Time-space-time switching
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
1326626 Automatic exchange systems AUSTRALIA COMMONWEALTH OF 18 Sept 1970 [25 Sept 1969] 44636/60 Heading H4K. A telecommunication exchange adapted for switching between TDM highways and arranged to transfer P.C.M. samples from a first time channel on one highway to a second channel on a second highway stores the samples at addresses independent of the particular time channels used on the highways. As shown the highways are arranged in groups SR1 to SRn of eight highways each group being associated with an input group speech memory such as GSM1 and an "output register memory" such as OPR1. Each highway is divided into 25 time slots, 24 of which are used for communication and the 25th for synchronization. Each time slot conveys an 8 bit serial word or sample. At the group speech memory each word is converted to parallel form and fed out on a super-highway HIM comprising 8 parallel conductors (one for each bit) and having 8 times as many time slots so as to be able to cope with all 8 highways of its group. Depending on whether a sample from a first highway is destined for the same or a different time slot on a second highway, the sample is routed via an interhighway HXJ or an intermediate storage interhighway of junctor such as H1J to a superhighway H1R-HNR leading to the group output register of the destination highway. Each junctor highway includes an associative store. A single storage location is used for both directions of transmission, one time slot being used for signals between the first highway and the location and a second time slot being used from the location to the second highway. The addressing arrangement for one highway stores a time address indicating the time slot of the incoming highway and the address of a storage location in which the sample from the incoming highway is to be stored. A comparator compares the time address with addresses successively generated by the exchange clock and on a match being detected the sample is gated from the location given by the storage location address to the highway and a sample is gated from the highway to the location to provide transmission in both directions. The address arrangement for the second highway works in similar fashion. The read in or read out can be inhibited until pre-arranged conditions are fulfilled but no reason for this is given. The junctor can be selected from those which are not involved in a read in or read out step and the storage location can be any which is free and not defective. The highways may be wire or radio links.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU6142869 | 1969-09-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1326626A true GB1326626A (en) | 1973-08-15 |
Family
ID=3746455
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB4463670A Expired GB1326626A (en) | 1969-09-25 | 1970-09-18 | Apparatus and method for routing discrete telecommunication signals |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS5139043B1 (en) |
BE (1) | BE756684A (en) |
DE (1) | DE2046069A1 (en) |
FR (1) | FR2062812A5 (en) |
GB (1) | GB1326626A (en) |
NL (1) | NL7014122A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4564764A (en) * | 1982-09-30 | 1986-01-14 | Fujitsu Limited | Wafer having chips for determining the position of the wafer by means of electron beams |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2215761B1 (en) * | 1973-01-29 | 1976-05-14 | Constr Telephoniques |
-
0
- BE BE756684D patent/BE756684A/en unknown
-
1970
- 1970-09-18 DE DE19702046069 patent/DE2046069A1/en active Pending
- 1970-09-18 GB GB4463670A patent/GB1326626A/en not_active Expired
- 1970-09-23 FR FR7035267A patent/FR2062812A5/fr not_active Expired
- 1970-09-24 NL NL7014122A patent/NL7014122A/xx not_active Application Discontinuation
- 1970-09-25 JP JP8353370A patent/JPS5139043B1/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4564764A (en) * | 1982-09-30 | 1986-01-14 | Fujitsu Limited | Wafer having chips for determining the position of the wafer by means of electron beams |
Also Published As
Publication number | Publication date |
---|---|
FR2062812A5 (en) | 1971-06-25 |
NL7014122A (en) | 1971-03-29 |
JPS5139043B1 (en) | 1976-10-26 |
BE756684A (en) | 1971-03-01 |
DE2046069A1 (en) | 1971-04-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |