GB1310489A - Data handling systems - Google Patents

Abstract

1310489 Storage access system INTERNATIONAL BUSINESS MACHINES CORP 22 Sept 1971 44092/71 Heading G4C A map of pending access requests for a bulk store 11 is maintained in an associative memory 18, a register 31 contains the address of the last granted access request, and the next access request to be granted is determined by modifying the contents of register 31 and searching associative memory 18 with the modified address. Requests are supplied to memory 18 from a central processor 10 (or another store) over bus 23. The bulk store 11 shown as a multiple disc unit has addresses made up of cylinder C (concentric track), local record R (angular position) and track T (disc surface) parts. Starting with the current address, memory 18 is searched by the C address part, using mask register 22, to determine if any further requests are pending for the same cylinder address. If no match is obtained, the C address part is passed through an associative memory 19 where it is incremented or decremented, depending on a flag which indicates the direction of C sweepsteadily inwards or outwards, and replaced in register 31. When a C match is obtained, a similar test is performed with the R address part and then the T address part, except that these parts are only incremented. The selected access request address finally obtained in register 31 is used to control head drive and switching unit 17 when the current accessing operation has been terminated. The entire selection process is controlled by a further associative memory 20 loaded with an algorithm corresponding to the particular queue discipline described and which is simply changed if the bulk store is replaced by one having different characteristics or if the discipline is changed. Memory 20 can also be loaded with several alternative algorithms and extra control fields for maintaining the actual sending request map in memory 18 and also a statistical map of these requests. While the system is otherwise idle, e.g. during a long head shift or record transfer, a particular one of these algorithms can then be selected to optimize the address selecting capability of the system. For example if twice as many pending requests are at C addresses above, as opposed to below, the current address, and the decrement flag is set, the flag may be reversed so that the higher addresses are accessed first.