GB1295957A - - Google Patents

Info

Publication number
GB1295957A
GB1295957A GB1295957DA GB1295957A GB 1295957 A GB1295957 A GB 1295957A GB 1295957D A GB1295957D A GB 1295957DA GB 1295957 A GB1295957 A GB 1295957A
Authority
GB
United Kingdom
Prior art keywords
circuit
frequency
timer
counter
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1295957A publication Critical patent/GB1295957A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/181Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B23/00Generation of oscillations periodically swept over a predetermined frequency range
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B2200/00Indexing scheme relating to details of oscillators covered by H03B
    • H03B2200/006Functional aspects of oscillators
    • H03B2200/0092Measures to linearise or reduce distortion of oscillator characteristics

Abstract

1295957 Automatic frequency control; monostable circuits WANDEL U GOLTERMANN 30 Nov 1970 [6 Dec 1969] 56688/70 Headings H3A and H3T A variable frequency generator comprises: (a) a counter 110 fed with pulses from an adjustable oscillator 102; (b) a coincidence circuit 111 having a first input from a presettable digital frequency selector 112, and a second input from the counter 110, the circuit emitting an identity signal when the counter output reaches the preset value; (c) a timer 118 for establishing a predetermined reference period; (d) a test circuit 113 receiving from timer 118, a pulse at the end of the reference period, and also receiving the output from coincidence circuit 111, to produce a control signal having a polarity dependent upon the relative order of occurrence of the outputs from timer 118 and circuit 111, which is fed back to control the frequency of oscillator 102; (e) means 108 coupled to the output of timer 118 and to the input to counter 110 for detecting any time lag between the start of the reference period and the first pulse to be counted; and (f) a delay 117 controlled by means 108 to reduce the time lag. The timer 118 is a monostable circuit whose unstable state may be adjusted by potentiometer 120 in accordance with the frequency to which the oscillator is to be set. In a first modification, Fig. 3 (not shown), the delay 117 of Fig. 1 is replaced by another monostable (325) and the timer comprises two monostables (318, 328) both with adjustable periods. This arrangement also has provision for the operating frequency to be given a sawtooth sweep by switching in a sawtooth generator (334). In a further modification, Fig. 5 (not shown), for applying a sweep to a C.R.T. in a frequency sweep test arrangement, the two limits of the frequency sweep are set by additional digital selectors (512A, 512B) which may be switched to the coincidence circuit (511). This circuit also has provision for generating frequency markers, details of the frequency marker generation being given in Fig. 6 (not shown). Monostable circuit, Fig. 4.-With no signal on lead 418<SP>1</SP> and the circuit in its stable state, transistor 438 is conductive and capacitor 433 discharged. When a positive input pulse is applied on 418<SP>1</SP>, bi-stable 436 is switched, but transistor 438 is held on by the connection of lead 418<SP>1</SP> to its base via OR-gate 440. Upon cessation of the input pulse 438 cuts off, and capacitor 433 charges through transistor 441 until the voltage across it equals a reference voltage set by potentiometer 431, the charging rate being set by an applied bias on lead 428b. Comparator 437 then resets bi-stable 436 to restore the circuit to its initial state.
GB1295957D 1969-12-06 1970-11-30 Expired GB1295957A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691961329 DE1961329B2 (en) 1969-12-06 1969-12-06 DIGITAL ADJUSTABLE FREQUENCY CONTROLLED VIBRATION GENERATOR

Publications (1)

Publication Number Publication Date
GB1295957A true GB1295957A (en) 1972-11-08

Family

ID=5753209

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1295957D Expired GB1295957A (en) 1969-12-06 1970-11-30

Country Status (2)

Country Link
DE (1) DE1961329B2 (en)
GB (1) GB1295957A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112255618A (en) * 2020-09-29 2021-01-22 中国兵器工业集团第二一四研究所苏州研发中心 Pixel-level time discrimination circuit

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL164164C (en) * 1970-09-24 1980-11-17 Philips Nv WIDEBAND ADJUSTABLE FREQUENCY GENERATOR.
CA1096519A (en) * 1976-10-27 1981-02-24 Rca Corporation Phase locked loop tuning system with a preset channel memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112255618A (en) * 2020-09-29 2021-01-22 中国兵器工业集团第二一四研究所苏州研发中心 Pixel-level time discrimination circuit
CN112255618B (en) * 2020-09-29 2024-01-05 中国兵器工业集团第二一四研究所苏州研发中心 Pixel-level moment identification circuit

Also Published As

Publication number Publication date
DE1961329A1 (en) 1971-06-24
DE1961329B2 (en) 1972-06-22

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee