GB1279026A - Digital control system - Google Patents

Digital control system

Info

Publication number
GB1279026A
GB1279026A GB757/70A GB75770A GB1279026A GB 1279026 A GB1279026 A GB 1279026A GB 757/70 A GB757/70 A GB 757/70A GB 75770 A GB75770 A GB 75770A GB 1279026 A GB1279026 A GB 1279026A
Authority
GB
United Kingdom
Prior art keywords
frequency
pulses
count
counter
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB757/70A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1279026A publication Critical patent/GB1279026A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
GB757/70A 1969-01-15 1970-01-07 Digital control system Expired GB1279026A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US79121369A 1969-01-15 1969-01-15

Publications (1)

Publication Number Publication Date
GB1279026A true GB1279026A (en) 1972-06-21

Family

ID=25152999

Family Applications (1)

Application Number Title Priority Date Filing Date
GB757/70A Expired GB1279026A (en) 1969-01-15 1970-01-07 Digital control system

Country Status (6)

Country Link
US (1) US3562661A (enExample)
JP (1) JPS4823004B1 (enExample)
FR (1) FR2028341A1 (enExample)
GB (1) GB1279026A (enExample)
NL (1) NL166371C (enExample)
SE (1) SE346645B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4425646A (en) 1980-07-11 1984-01-10 Tokyo Shibaura Denki Kabushiki Kaisha Input data synchronizing circuit
GB2122822A (en) * 1982-06-30 1984-01-18 Int Standard Electric Corp Frequency control device to synchronise an oscillator with an external signal of very accurate mean frequency but having a high jitter

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3646452A (en) * 1971-02-16 1972-02-29 Ibm Second order digital phaselock loop
NL7111888A (enExample) * 1971-08-28 1973-03-02
JPS561824B2 (enExample) * 1974-04-27 1981-01-16
FR2301964A1 (fr) * 1975-02-21 1976-09-17 Telecommunications Sa Horloge numerique synchronisee
US4011407A (en) * 1976-02-26 1977-03-08 Rca Corporation Narrow-band eight-phase modem
BE850823A (fr) * 1977-01-28 1977-07-28 Acec Disjoncteur a interruption rapide
FR2458181A1 (fr) * 1979-06-01 1980-12-26 Thomson Csf Dispositif de synchronisation d'un signal d'horloge et systemes de transmission de donnees synchrones comportant un tel dispositif
JPS56106421A (en) * 1980-01-29 1981-08-24 Nippon Hoso Kyokai <Nhk> Constant ratio delay circuit
IT1194538B (it) * 1983-12-23 1988-09-22 Italtel Spa Circuito numerico ad aggancio di fase (pdll)
EP0157053A3 (en) * 1984-03-19 1987-09-02 Western Digital Corporation High order digital phase lock loop system
US4639680A (en) * 1985-04-12 1987-01-27 Sperry Corporation Digital phase and frequency detector
US5302916A (en) * 1992-12-21 1994-04-12 At&T Bell Laboratories Wide range digital frequency detector
US5511100A (en) * 1993-12-13 1996-04-23 Motorola, Inc. Method and apparatus for performing frequency detection
JP2007219854A (ja) * 2006-02-16 2007-08-30 Fujitsu Ltd 出力制御装置および記録媒体駆動装置用制御装置
US8250417B2 (en) * 2009-01-14 2012-08-21 Micron Technology, Inc. Method for detecting flash program failures
RU2661354C1 (ru) * 2017-08-23 2018-07-16 Российская Федерация, от имени которой выступает Государственная корпорация по атомной энергии "Росатом" Устройство контроля работы генератора
EP4040191A1 (de) * 2020-02-20 2022-08-10 2pi-Labs GmbH Radarsystem und synchronisationsverfahren

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4425646A (en) 1980-07-11 1984-01-10 Tokyo Shibaura Denki Kabushiki Kaisha Input data synchronizing circuit
GB2122822A (en) * 1982-06-30 1984-01-18 Int Standard Electric Corp Frequency control device to synchronise an oscillator with an external signal of very accurate mean frequency but having a high jitter

Also Published As

Publication number Publication date
US3562661A (en) 1971-02-09
FR2028341A1 (enExample) 1970-10-09
NL7000332A (enExample) 1970-07-17
SE346645B (enExample) 1972-07-10
JPS4823004B1 (enExample) 1973-07-10
NL166371B (nl) 1981-02-16
NL166371C (nl) 1981-07-15

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee