GB1278102A - Pipelined high speed arithmetic unit - Google Patents

Pipelined high speed arithmetic unit

Info

Publication number
GB1278102A
GB1278102A GB2985469A GB2985469A GB1278102A GB 1278102 A GB1278102 A GB 1278102A GB 2985469 A GB2985469 A GB 2985469A GB 2985469 A GB2985469 A GB 2985469A GB 1278102 A GB1278102 A GB 1278102A
Authority
GB
United Kingdom
Prior art keywords
arithmetic unit
vectors
cpu
file
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2985469A
Other languages
English (en)
Inventor
William Joseph Watson
Charles Melvin Stephenson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of GB1278102A publication Critical patent/GB1278102A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/487—Multiplying; Dividing
    • G06F7/4876—Multiplying
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5355—Using iterative approximation not using digit recurrence, e.g. Newton Raphson or Goldschmidt
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
GB2985469A 1968-07-09 1969-06-12 Pipelined high speed arithmetic unit Expired GB1278102A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US74357368A 1968-07-09 1968-07-09

Publications (1)

Publication Number Publication Date
GB1278102A true GB1278102A (en) 1972-06-14

Family

ID=24989309

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2985469A Expired GB1278102A (en) 1968-07-09 1969-06-12 Pipelined high speed arithmetic unit

Country Status (7)

Country Link
JP (1) JPS505541B1 (enExample)
BE (1) BE735857A (enExample)
CA (1) CA926016A (enExample)
DE (1) DE1934441C3 (enExample)
FR (1) FR2012589A1 (enExample)
GB (1) GB1278102A (enExample)
NL (1) NL6910537A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2144245A (en) * 1983-07-28 1985-02-27 Secr Defence A digital data processor for matrix/matrix multiplication
US4686645A (en) * 1983-07-28 1987-08-11 National Research Development Corporation Pipelined systolic array for matrix-matrix multiplication

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51115841U (enExample) * 1975-03-14 1976-09-20
US4075704A (en) * 1976-07-02 1978-02-21 Floating Point Systems, Inc. Floating point data processor for high speech operation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2144245A (en) * 1983-07-28 1985-02-27 Secr Defence A digital data processor for matrix/matrix multiplication
US4686645A (en) * 1983-07-28 1987-08-11 National Research Development Corporation Pipelined systolic array for matrix-matrix multiplication

Also Published As

Publication number Publication date
DE1934441B2 (de) 1973-08-09
CA926016A (en) 1973-05-08
FR2012589A1 (enExample) 1970-03-20
NL6910537A (enExample) 1970-01-13
JPS505541B1 (enExample) 1975-03-05
BE735857A (enExample) 1969-12-16
DE1934441C3 (de) 1974-03-28
DE1934441A1 (de) 1970-01-15

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Legal Events

Date Code Title Description
PS Patent sealed
PE20 Patent expired after termination of 20 years