GB1250380A - - Google Patents

Abstract

1,250,380. Echo suppressors. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 26 Aug., 1969 [29 Aug., 1968], No. 42474/69. Heading H4R. In a loudspeaking telephone system signals in each path are applied via first signal channels including rectifiers DA 1 and DA 2 and delay circuits S 1 and S 2 to respective comparator circuits K 1 and K 2 in which they are compared with signals derived from the other path via respective second signal channels including rectifiers DB 1 and DB 2 ; the second signal channels having lower gain than the first signal channels. The outputs from the comparators are fed to respective " NAND " gates ND1 and ND2 each of whose other input is derived from the output of the other " NAND " gate. The NAND. gate outputs also control respective variable gain circuits R 1 and R 2 in the signal paths to prevent singing. With no signal inputs on either path no outputs are obtained from the comparators and the low inputs to the " NAND " gates providing high outputs at points P 3 and P 4 so that the regulating devices R 1 and R 2 are in the high attenuation condition. An audio signal on one channel causes the respective comparator to provide an output causing the respective " NAND " gate to switch to low output condition switching the regulator in that channel to assume a low attenuation condition, and the interconnection of the " NAND " gates to maintain a high attenuation condition in the other signal path. The delay circuits DA 1 and DA 2 provide a hangover period covering short interruptions in speech, and have short rise time and delayed decay characteristics. The control signal channels may be made frequency dependent by inserting filters in FR 1 , FR 2 and FK 1 , FK 2 to discriminate against frequencies at which cross talk from loudspeaker to microphone is strongest, so allowing an interrupting party to gain control of the circuit by raising his speech level only slightly auxilliary, damping devices DR 1 and DR 2 may be provided to be conducting during no signal conditions, with the main variable gain circuits at an intermediate gain condition, to be switched by the outputs of the " NAND " gates to completely cut the transmission on the inactive path when a signal is detected on the other path. This allows the main gain controlling circuits to have an intermediate gain to provide smoother opening of a channel from the rest condition while preventing acoustic feedback during operation.