GB1220962A - Improvements to ternary coders - Google Patents

Improvements to ternary coders

Info

Publication number
GB1220962A
GB1220962A GB08873/68A GB1887368A GB1220962A GB 1220962 A GB1220962 A GB 1220962A GB 08873/68 A GB08873/68 A GB 08873/68A GB 1887368 A GB1887368 A GB 1887368A GB 1220962 A GB1220962 A GB 1220962A
Authority
GB
United Kingdom
Prior art keywords
ternary
digit
output
binary
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB08873/68A
Inventor
Michel Louis Avignon
Josef Ludwig Mader
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Priority to GB08873/68A priority Critical patent/GB1220962A/en
Publication of GB1220962A publication Critical patent/GB1220962A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1009Calibration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Dc Digital Transmission (AREA)

Abstract

1,220,962. Analogue to digital converters. INTERNATIONAL STANDARD ELECTRIC CORP. 22 April, 1968, No. 18873/68. Heading G4H. An automatic calibration arrangement for centring the response curve of a feedback comparison ternary scale analogue-to-digital converter comprises means periodically to couple a calibration voltage to the converter, which should produce a predetermined ternary output when the converter is properly centred, and means detecting a deviation from this output which adjusts the centring to compensate for the deviation. A number of input voltages ec1 &c. and the calibration voltage eo are gated in turn to the input circuit NP. The calibration voltage is half the full scale voltage of the circuit. The maximum signal in a 5-digit ternary coder produces an output of 22222, and the half fullscale calibration voltage should produce an output of 11111. Each ternary digit is represented by two binary bits stored in register RG. The logical control unit LU sets the most significant digit in register RG to 2 (binary bits 1, 0) and comparator CM detects whether the input is exceeded or not by the output from decoder DC. This may be as described in Specification 1,219,148. If the input is exceeded, the first binary bit is reset to 0, giving a ternary digit of 1. If this is still too much the second binary bit is set to 1 giving binary 01, ternary 0. In the same way the pairs of binary bits are set in turn for succeeding ternary digits. These digits appear on flip-flop BD and are transmitted to an output A and serve to control the logical control unit LU. During the time calibration voltage eo is applied by gating signal Vs, the centering correction circuit CC is made operative. The pairs of two binary bits representing the successively lower ternary digits are examined and the first to have a value other than 1 are used to control the increase or decrease of the charge on a capacitor providing the correction voltage U. For a properly calibrated circuit every digit should be 1. If a digit is found valued 0, the charge decreases and if a digit is found valued 2, the charge increases.
GB08873/68A 1968-04-22 1968-04-22 Improvements to ternary coders Expired GB1220962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08873/68A GB1220962A (en) 1968-04-22 1968-04-22 Improvements to ternary coders

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB08873/68A GB1220962A (en) 1968-04-22 1968-04-22 Improvements to ternary coders

Publications (1)

Publication Number Publication Date
GB1220962A true GB1220962A (en) 1971-01-27

Family

ID=10119893

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08873/68A Expired GB1220962A (en) 1968-04-22 1968-04-22 Improvements to ternary coders

Country Status (1)

Country Link
GB (1) GB1220962A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2152310A (en) * 1983-12-30 1985-07-31 Microskill Limited Apparatus for effecting conversion between digital and analogue electrical signals

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2152310A (en) * 1983-12-30 1985-07-31 Microskill Limited Apparatus for effecting conversion between digital and analogue electrical signals

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