GB1216405A - Improvements in or relating to periodically swept aerial systems - Google Patents

Abstract

1,216,405. Aerials. CSF-COMPAGNIE GENERALE DE TELEGRAPHIE SANS FIL. 9 April, 1968 [12 April, 1967], No. 17015/68. Heading H4A. In a periodically swept aerial arrangement with an aerial system comprising a plurality of aerials fed through quantized phase shifters, means are provided for operating the phase shifters so as to reduce beaming errors due to quantization, only one phase shifter being operated at a time. As described, an aerial system comprises n aerial A 1 , A 2 , . . . A n , Fig. 2, which are arranged on a circle around a communication satellite. The satellite is rotating and the beam from the aerial system must be counter-rotated so that it remains pointing towards the centre of the earth. The aerials are connected to the n output terminals of a Butler matrix B, whose n input terminals are respectively connected through n quantized variable phase-shifters Ph 1 , Ph 2 . . . Ph n , to the n output terminals of a power divider D. A control unit 5 develops control signals for the n phase shifters and logic means are provided for preventing simultaneous variation of phase shifts. A position sensor 6 on the satellite gives an output which is representative of the angle 0 0 between the required direction of the beam from the aerial and a reference direction, and said output is applied to a device 7 which gives a modified output corresponding to an angle #, the purpose being to compensate for the quantization of the variable phase shifts available in the aerial feed means. It is stated that the relationship between # and # 0 is: # 0 =#+K sin n # (where K is a constant). The device 8 may comprise a memory in which is registered a number of values of # corresponding to values of # 0 , and an arithmetical interpolation computer. From the # signal a phase computer 3 provides n outputs, corresponding to the n place shifters, and these are quantized in a test circuit 8, and are fed as n inputs to the control unit 5. The test circuit 8 provides for each output signal from the phase computer 3 an output signal to a multiple level comparator 81, Fig. 7, where it is compared with values of the odd multiples of the half-quantization step. If an output signal is equal to one of those values, it is passed through a normally open gate 821 to a curve computer 84, which supplies the control device 5. If the output signal from the phase computer 3 is not equal to one of the aforesaid values, the comparator 81 gives an output which closes the gate 821 and opens a gate 822, so that the signal is passed to two gates 831, 832 which operate in opposition and are controlled by a comparator 810. The said comparator compares a noise signal from a generator 9 with a threshold voltage V 0 , and if it gives an output the gate 832 is opened and the gate 831 is closed, and vice versa. The signal from the phase computer 3 is thus passed either to a curve computer 841 (lower values) or to a curve computer 842 (higher values), which supplies the control device 5. Only one of the devices 84, 841, 842 is in operation at a time.