GB1200155A - Improvements in or relating to centrally controlled exchange systems - Google Patents

Improvements in or relating to centrally controlled exchange systems

Info

Publication number
GB1200155A
GB1200155A GB1607369A GB1607369A GB1200155A GB 1200155 A GB1200155 A GB 1200155A GB 1607369 A GB1607369 A GB 1607369A GB 1607369 A GB1607369 A GB 1607369A GB 1200155 A GB1200155 A GB 1200155A
Authority
GB
United Kingdom
Prior art keywords
relating
exchange systems
centrally controlled
controlled exchange
centrally
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1607369A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of GB1200155A publication Critical patent/GB1200155A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G06F11/1645Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components and the comparison itself uses redundant hardware
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1666Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023Failover techniques
    • G06F11/2033Failover techniques switching over of hardware resources
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/165Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
GB1607369A 1968-03-29 1969-03-27 Improvements in or relating to centrally controlled exchange systems Expired GB1200155A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AT312468A AT285689B (en) 1968-03-29 1968-03-29 Centrally controlled switching system for telecommunications, in particular telephone technology

Publications (1)

Publication Number Publication Date
GB1200155A true GB1200155A (en) 1970-07-29

Family

ID=3545667

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1607369A Expired GB1200155A (en) 1968-03-29 1969-03-27 Improvements in or relating to centrally controlled exchange systems

Country Status (8)

Country Link
AT (1) AT285689B (en)
BE (1) BE730656A (en)
CH (1) CH489173A (en)
DE (1) DE1802999B2 (en)
FR (1) FR2005022A1 (en)
GB (1) GB1200155A (en)
NL (1) NL6904243A (en)
SE (1) SE337848B (en)

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4453215A (en) * 1981-10-01 1984-06-05 Stratus Computer, Inc. Central processing apparatus for fault-tolerant computing
US4816990A (en) * 1986-11-05 1989-03-28 Stratus Computer, Inc. Method and apparatus for fault-tolerant computer system having expandable processor section
US4866604A (en) * 1981-10-01 1989-09-12 Stratus Computer, Inc. Digital data processing apparatus with pipelined memory cycles
US4907228A (en) * 1987-09-04 1990-03-06 Digital Equipment Corporation Dual-rail processor with error checking at single rail interfaces
US5048022A (en) * 1989-08-01 1991-09-10 Digital Equipment Corporation Memory device with transfer of ECC signals on time division multiplexed bidirectional lines
US5065312A (en) * 1989-08-01 1991-11-12 Digital Equipment Corporation Method of converting unique data to system data
US5068780A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones
US5068851A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Apparatus and method for documenting faults in computing modules
US5099485A (en) * 1987-09-04 1992-03-24 Digital Equipment Corporation Fault tolerant computer systems with fault isolation and repair
US5153881A (en) * 1989-08-01 1992-10-06 Digital Equipment Corporation Method of handling errors in software
US5163138A (en) * 1989-08-01 1992-11-10 Digital Equipment Corporation Protocol for read write transfers via switching logic by transmitting and retransmitting an address
US5185877A (en) * 1987-09-04 1993-02-09 Digital Equipment Corporation Protocol for transfer of DMA data
EP0528538A2 (en) * 1991-07-18 1993-02-24 Tandem Computers Incorporated Mirrored memory multi processor system
US5249187A (en) * 1987-09-04 1993-09-28 Digital Equipment Corporation Dual rail processors with error checking on I/O reads
US5251227A (en) * 1989-08-01 1993-10-05 Digital Equipment Corporation Targeted resets in a data processor including a trace memory to store transactions
US5291494A (en) * 1989-08-01 1994-03-01 Digital Equipment Corporation Method of handling errors in software
US6820213B1 (en) 2000-04-13 2004-11-16 Stratus Technologies Bermuda, Ltd. Fault-tolerant computer system with voter delay buffer

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4453215A (en) * 1981-10-01 1984-06-05 Stratus Computer, Inc. Central processing apparatus for fault-tolerant computing
US4486826A (en) * 1981-10-01 1984-12-04 Stratus Computer, Inc. Computer peripheral control apparatus
US4654857A (en) * 1981-10-01 1987-03-31 Stratus Computer, Inc. Digital data processor with high reliability
US4866604A (en) * 1981-10-01 1989-09-12 Stratus Computer, Inc. Digital data processing apparatus with pipelined memory cycles
US4816990A (en) * 1986-11-05 1989-03-28 Stratus Computer, Inc. Method and apparatus for fault-tolerant computer system having expandable processor section
US5099485A (en) * 1987-09-04 1992-03-24 Digital Equipment Corporation Fault tolerant computer systems with fault isolation and repair
US4907228A (en) * 1987-09-04 1990-03-06 Digital Equipment Corporation Dual-rail processor with error checking at single rail interfaces
US5249187A (en) * 1987-09-04 1993-09-28 Digital Equipment Corporation Dual rail processors with error checking on I/O reads
US5185877A (en) * 1987-09-04 1993-02-09 Digital Equipment Corporation Protocol for transfer of DMA data
US5068851A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Apparatus and method for documenting faults in computing modules
US5048022A (en) * 1989-08-01 1991-09-10 Digital Equipment Corporation Memory device with transfer of ECC signals on time division multiplexed bidirectional lines
US5153881A (en) * 1989-08-01 1992-10-06 Digital Equipment Corporation Method of handling errors in software
US5163138A (en) * 1989-08-01 1992-11-10 Digital Equipment Corporation Protocol for read write transfers via switching logic by transmitting and retransmitting an address
US5068780A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones
US5065312A (en) * 1989-08-01 1991-11-12 Digital Equipment Corporation Method of converting unique data to system data
US5251227A (en) * 1989-08-01 1993-10-05 Digital Equipment Corporation Targeted resets in a data processor including a trace memory to store transactions
US5291494A (en) * 1989-08-01 1994-03-01 Digital Equipment Corporation Method of handling errors in software
EP0528538A2 (en) * 1991-07-18 1993-02-24 Tandem Computers Incorporated Mirrored memory multi processor system
EP0528538A3 (en) * 1991-07-18 1994-05-18 Tandem Telecomm Syst Mirrored memory multi processor system
US5495570A (en) * 1991-07-18 1996-02-27 Tandem Computers Incorporated Mirrored memory multi-processor system
US6820213B1 (en) 2000-04-13 2004-11-16 Stratus Technologies Bermuda, Ltd. Fault-tolerant computer system with voter delay buffer

Also Published As

Publication number Publication date
CH489173A (en) 1970-04-15
NL6904243A (en) 1969-10-01
FR2005022A1 (en) 1969-12-05
DE1802999B2 (en) 1971-04-15
SE337848B (en) 1971-08-23
AT285689B (en) 1970-11-10
DE1802999A1 (en) 1969-11-06
BE730656A (en) 1969-09-29

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee