GB1188433A - Data Processing Apparatus - Google Patents

Abstract

1,188,433. Error checking in data processors. INTERNATIONAL BUSINESS MACHINES CORP. 11 Sept., 1968 [27 Sept., 1967], No. 43161/68. Heading G4A. In data processing apparatus, a check number is generated for a series of groups of N data bits (e.g. micro-programme instructions or parts thereof) being transferred from one location (e.g. card reader) to another (e.g. core memory), by using N counting devices each counting the 0-to-1 and 1-to-0 changes in a respective bit position when the counting device is conditioned (see below), and the check number is compared with a stored check number to determine whether the transfer is complete or correct. The counting is modulo-2, each counting device being an EXCL-OR fed by the counting device input and the 1 output of a flip-flop, the EXCL-OR feeding the flip-flop, which provides the counting device output. In one embodiment, all the counting devices are conditioned for every group of bits, and three stored check numbers are provided any one of which or all in turn (manual or automatic selection) can be compared with the generated check number e.g. to determine if the micro-programme entered into the machine is applicable to this machine. In a modification, the counting devices are enabled in turn by a decoded clock-driven binary counter so that each counting device responds to a respective 1/Nth of the bit-groups. A further modification has 3 such binary counters forming a single binary counter and controlling respective check number generators each as above, each bit-group going to the three generators in common. In this case the 3 generated check numbers are compared with respective thirds of a stored check number.