GB1187185A - Process of Etching Semiconductive Material. - Google Patents

Process of Etching Semiconductive Material.

Info

Publication number
GB1187185A
GB1187185A GB47115/68A GB4711568A GB1187185A GB 1187185 A GB1187185 A GB 1187185A GB 47115/68 A GB47115/68 A GB 47115/68A GB 4711568 A GB4711568 A GB 4711568A GB 1187185 A GB1187185 A GB 1187185A
Authority
GB
United Kingdom
Prior art keywords
etching
layer
masking
exposed
oct
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB47115/68A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of GB1187185A publication Critical patent/GB1187185A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02258—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

1,187,185. Etching. R.C.A. CORPORATION. 4 Oct., 1968 [17 Oct., 1967], No. 47115/68. Heading B6J. [Also in Division H1] A region underlying a junction spaced from the surface of a semi-conductor body is exposed by oxidizing a predetermined area of the surface of the body to form an oxide layer which is then removed by an etchant which does not attack the semi-conductor and repeating these steps until sufficient material is removed to expose the region. The method is shown applied to manufacture of a transistor from the Fig. 1 structure which has been formed by epitaxial deposition of silicon layers on a substrate 12 of silicon spinel or sapphire. Masking layer 30 is formed by pyrolytically depositing silica overall from siloxane followed by photo-resist and etching steps. The exposed surface 32 is then anodically oxidized to a depth of 700 Š in N-methylacetamide and the oxide removed by etching in normal hydrofluoric acid, the processes being repeated until exposure of P- type base layer 24 is confirmed by a thermal probe. A larger area mask is then applied and mesa etching effected in a nitric-hydrofluoric acid mixture to expose N + collector contact zone 16. All the masking is then removed and a passivating oxide layer deposited. Emitter, base and collector contacts 42, 44, 46 are then applied through apertures etched in this layer and leads thermocompression bonded thereto. Masking 30 needs to be thick enough as not to be removed by the etchant before layer 24 is exposed.
GB47115/68A 1967-10-17 1968-10-04 Process of Etching Semiconductive Material. Expired GB1187185A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US67590667A 1967-10-17 1967-10-17

Publications (1)

Publication Number Publication Date
GB1187185A true GB1187185A (en) 1970-04-08

Family

ID=24712430

Family Applications (1)

Application Number Title Priority Date Filing Date
GB47115/68A Expired GB1187185A (en) 1967-10-17 1968-10-04 Process of Etching Semiconductive Material.

Country Status (3)

Country Link
DE (1) DE1803619A1 (en)
FR (1) FR1581912A (en)
GB (1) GB1187185A (en)

Also Published As

Publication number Publication date
DE1803619A1 (en) 1969-05-29
FR1581912A (en) 1969-09-19

Similar Documents

Publication Publication Date Title
US3961999A (en) Method for forming recessed dielectric isolation with a minimized "bird's beak" problem
US3966514A (en) Method for forming dielectric isolation combining dielectric deposition and thermal oxidation
GB1208574A (en) Methods of manufacturing semiconductor devices
GB1219986A (en) Improvements in or relating to the production of semiconductor bodies
GB1147599A (en) Method for fabricating semiconductor devices in integrated circuits
GB972512A (en) Methods of making semiconductor devices
GB1144328A (en) Solid-state circuit consisting of a semiconductor body with active components, passive components, and conducting paths
GB1381602A (en) Integrated circuit structure and method for making integrated circuit structure
GB1421212A (en) Semiconductor device manufacture
GB1517242A (en) Integrated circuits
GB1332931A (en) Methods of manufacturing a semiconductor device
GB1095413A (en)
GB1470212A (en) Manufacture of transistor structures
US3489961A (en) Mesa etching for isolation of functional elements in integrated circuits
GB1339095A (en) Fabrication of monolithic integrated circuits
GB1190893A (en) A Method of Manufacturing a Semiconductor Device and a Semiconductor Device Obtained Thereby
GB1515639A (en) Integrated circuits
GB1449559A (en) Production of a semiconductor device
US4338620A (en) Semiconductor devices having improved alignment marks
GB1413161A (en) Process for manufacturing semiconductor devices
US4497108A (en) Method for manufacturing semiconductor device by controlling thickness of insulating film at peripheral portion of element formation region
US3928091A (en) Method for manufacturing a semiconductor device utilizing selective oxidation
US3698966A (en) Processes using a masking layer for producing field effect devices having oxide isolation
US3681153A (en) Process for fabricating small geometry high frequency semiconductor device
US3764410A (en) Method of making ultra fine geometry planar semiconductor devices

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees