GB1140579A - Method of making semiconductor devices and devices made thereby - Google Patents

Method of making semiconductor devices and devices made thereby

Info

Publication number
GB1140579A
GB1140579A GB3718866A GB3718866A GB1140579A GB 1140579 A GB1140579 A GB 1140579A GB 3718866 A GB3718866 A GB 3718866A GB 3718866 A GB3718866 A GB 3718866A GB 1140579 A GB1140579 A GB 1140579A
Authority
GB
United Kingdom
Prior art keywords
semi
layer
wafer
insulating layer
diffusing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3718866A
Inventor
Joseph Franks
Peter Richard Selway
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB3718866A priority Critical patent/GB1140579A/en
Publication of GB1140579A publication Critical patent/GB1140579A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2258—Diffusion into or out of AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Led Devices (AREA)
  • Semiconductor Lasers (AREA)

Abstract

1,140,579. Semi-conductor devices; lasers. STANDARD TELEPHONES & CABLES Ltd. 19 Aug., 1966, No. 37188/66. Headings H1C and H1K. Semi-insulating regions are produced in a body of semi-conductor material by diffusing-in a suitable impurity through a protective surface layer. A wafer (1) of N-type GaAs is lapped, polished and etched and a layer (2) of SiO 2 is deposited on one face, Fig. 1 (not shown). A layer (3) of Cr is evaporated on to the oxide layer (2) and the wafer is placed in an evacuated silica tube and heated to diffuse the Cr through the oxide into the GaAs to form a semi-insulating layer (4), having a resistivity of about 10<SP>8</SP> ohm cm., Figs. 2 and 3 (not shown). The SiO 2 layer and the excess Cr are removed by etching, Fig. 4 (not shown). The wafer is then processed in one of the following ways. FETs are produced by applying a SiO 2 mask (5) to the semi-insulating layer (4), and vapour diffusing-in Zn to form P-type source and drain regions (6 and 7) which extend completely through the semi-insulating layer (4), Figs., 5 and 6 (not shown). The oxide layer is removed, Fig. 7 (not shown), and metal electrodes 8 and 9 are deposited on the source and drain regions 6 and 7 and on the semi-insulating layer 4, Fig. 8. Electrode 9 is the gate electrode and is insulated from the current channel, which forms at the interface between the layer 4 and the substrate 1, by the semi-insulating region 4. LASERS are produced by diffusing Zn into a plurality of P-type parallel strips (12) which extend through the semi-insulating layer (4), cleaving the wafer transversely to the strips, and sawing between the strips, Figs. 10 to 12 (not shown). The devices are then mounted either by alloying between metal blocks or by means of indium pressure contacts. One contact is applied to the base of the wafer and the other to the whole of the top surface. Non-Lasing LIGHT EMITTING DIODES may be made using the same diffusion method as for lasers but different cutting and shaping steps. P.I.N. SWITCHING DIODES are produced by diffusing Zn into the whole of the surface of the semi-insulating layer, applying contacts to the top and bottom surfaces of the wafer, and then dicing. The P-type impurity may be Cd or Mg instead of Zn.
GB3718866A 1966-08-19 1966-08-19 Method of making semiconductor devices and devices made thereby Expired GB1140579A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB3718866A GB1140579A (en) 1966-08-19 1966-08-19 Method of making semiconductor devices and devices made thereby

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3718866A GB1140579A (en) 1966-08-19 1966-08-19 Method of making semiconductor devices and devices made thereby

Publications (1)

Publication Number Publication Date
GB1140579A true GB1140579A (en) 1969-01-22

Family

ID=10394495

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3718866A Expired GB1140579A (en) 1966-08-19 1966-08-19 Method of making semiconductor devices and devices made thereby

Country Status (1)

Country Link
GB (1) GB1140579A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3700978A (en) * 1971-03-18 1972-10-24 Bell Telephone Labor Inc Field effect transistors and methods for making field effect transistors
US3713912A (en) * 1971-02-11 1973-01-30 Bell Telephone Labor Inc Gallium arsenide field effect structure
US4033788A (en) * 1973-12-10 1977-07-05 Hughes Aircraft Company Ion implanted gallium arsenide semiconductor devices fabricated in semi-insulating gallium arsenide substrates
US4297783A (en) * 1979-01-30 1981-11-03 Bell Telephone Laboratories, Incorporated Method of fabricating GaAs devices utilizing a semi-insulating layer of AlGaAs in combination with an overlying masking layer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3713912A (en) * 1971-02-11 1973-01-30 Bell Telephone Labor Inc Gallium arsenide field effect structure
US3700978A (en) * 1971-03-18 1972-10-24 Bell Telephone Labor Inc Field effect transistors and methods for making field effect transistors
US4033788A (en) * 1973-12-10 1977-07-05 Hughes Aircraft Company Ion implanted gallium arsenide semiconductor devices fabricated in semi-insulating gallium arsenide substrates
US4297783A (en) * 1979-01-30 1981-11-03 Bell Telephone Laboratories, Incorporated Method of fabricating GaAs devices utilizing a semi-insulating layer of AlGaAs in combination with an overlying masking layer

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