GB1112226A - An arrangement for low frequency processing of high frequency voltages - Google Patents

Abstract

1,112,226. Colour television. HAZELTINEAGA LABORATORIUM G.m.b.H. 3 Jan., 1967 [11 Jan., 1966 (2)], No. 216/67. Heading H4F. The Specification describes a system for the synchronous demodulation of the chrominance signals in a PAL type receiver and also some preliminary circuitry. Such preliminary circuitry provides for the production of a reference demodulating carrier, having its phase switched through 180 degrees on alternate lines. A prior art method of doing this is shown in Fig. 1 wherein the carrier Ue is applied to the input winding of a transformer T1, having two secondaries W1 and W2 connected in parallel antiphase to an output transformer T2, via switching diodes D1 and D2. Each diode is opened on alternate lines by pulses from a bi-stable multivibrator comprising active elements R÷1, R÷2 and passive elements M1. The basic invention is to incorporate the diode D1 and D2 into the multivibrator active elements. One method is shown in Fig 2a in which the active elements become pentodes with the control and screen grids performing the respective functions of the control grids and anodes of the triodes and the suppressor grids and anodes performing the functions of the diodes, the carrier Ue being applied in antiphase to the suppressor grids via centre earthed transformer T3. The centre tapped transformer is transferred to the output of the pentodes in the circuit of Fig. 2b (not shown) and the suppressors may be earthed, with the carrier applied between the centre tap of the output transformer and earth in Fig. 2c (not shown). The triodes of Fig. 1 may be made to carry the carrier frequency in reflex amplifier fashion, and Figs. 3a-3d (not shown) show various methods of connecting input windings W3/W4 and output windings W5/W6, using the transformer connections of Fig. 4a or 4b (not shown) to obtain the phase inversion. A transistorized version of the circuit of Fig. 3a is shown in Fig. 5 (not shown). The synchronous demodulator shown in Fig. 6 uses the circuit of Fig. 2a, the chrominance signal Uc being applied via capacitor C13 to the mixer/detector sections of the pentodes R÷5 and R÷6 and the detected chrominance signal Dc being taken off via carrier eliminating low pass filter R14/C14.