GB1074475A - Improvements in or relating to time division multiplex systems - Google Patents

Abstract

1,074,475. Multiplex pulse signalling; semiconductor circuits. STANDARD TELEPHONES & CABLES Ltd. Aug. 27, 1965 [Aug. 28, 1964], No. 35353/64. Headings H3T and H4L. In a time division multiplex system each time slot includes two portions each of which may be occupied by an amplitude modulated pulse, one pulse representing the amplitude of an analogue signal at the time slot alloted to that signal and the other pulse representing the amplitude of the same analogie signal at an earlier time in the multiple cycle. A further portion of the time slot may be used for the transmission of signalling conditions. As described 36 channels are provided and the input signal is sampled at twice the channel pulse frequency one sample being obtained at the time at which the channel is connected to the highway and the other sample half a frame previously and then stored until required. At the receiver the current sample is delayed by half a frame while the other sample is dealt with immediately. Transmitter.-The modulator shown, Fig. 3 is assumed to be for channel 1 and includes field effect transistors F 4 , F 5 , the speech signal from a subscriber being supplied to F 5 ' Transistor F 5 is opened during the second portion of the time slot by a pulse T 1b and capacitor C 3 is charged accordingly. At this time transistor F 4 is unblocked due to pulse T 1a extending over both speech portions of the time slot and the second speech pulse of the time slot is transferred to the highway. A half-frame later pulse T 19b causes capacitor C 3 to be charged again via transistor F 5 and when channel P next occurs, the transistor F, is unblocked by the first part of pulse T 1a to form the first speech pulse of that time slot. Receiver.-The incoming highway is connected to a field effect transistor F 1 , Fig. 2, controlled by pulse T 1a extending over both speech portions of the time slot. A field effect transistor F 2 is controlled by a narrow pulse T 1a extending only over the first speech portion of the time slot so that at this time a capacitor C 2 is charged to the level of the first speech pulse of the input signal. When the short pulse T 1a ceases the transistor F 2 is blocked and the capacitor C 1 charges to the level of the second speech pulse of the input signal. Capacitor C 2 is connected to a further field-effect transistor F 3 which provides a constant output at a level determined by the charge on capacitor C 2 an additional low-pass filter being provided if necessary. A pulse T 19a occurs a half-frame later so that the charge on C 1 is transferred to C 2 and the output from F 3 modified accordingly. A modification, Fig. 4 (not shown), is described in which conventional junction transistors are used. In this case the storage capacitors (C 1 , C 2 ) have to be reset to zero potential between charges by transistors (T 7 and T 9 ) respectively. An incoming speech sample is passed via transistor (T 1 ), which is unblocked for the duration of both speech portions of the time slot by a pulse applied to its emitter, and via transistor T 2 which is caused to conduct by transistor T, being gated off, to charge capacitor C 1 . A further transistor T 3 is controlled by transistor T 8 so that it conducts during the first speech portion of the first time slot and also a half frame later. Thus the first speech portion is passed via transistor T 3 to charge capacitor C 2 but the second portion is retained by capacitor C 1 until transistor T 3 conducts a half-frame later. The samples stored by C 2 are supplied to the output stage by a Darlington circuit T 4 T 5 .