GB1072703A - Improvements in and relating to methods of manufacturing semiconductor bodies - Google Patents

Improvements in and relating to methods of manufacturing semiconductor bodies

Info

Publication number
GB1072703A
GB1072703A GB1974464A GB1974464A GB1072703A GB 1072703 A GB1072703 A GB 1072703A GB 1974464 A GB1974464 A GB 1974464A GB 1974464 A GB1974464 A GB 1974464A GB 1072703 A GB1072703 A GB 1072703A
Authority
GB
United Kingdom
Prior art keywords
cavity
wafer
type
epitaxial
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1974464A
Inventor
Thomas Klein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Components Ltd
Original Assignee
Mullard Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mullard Ltd filed Critical Mullard Ltd
Priority to GB1974464A priority Critical patent/GB1072703A/en
Priority to NL6505716A priority patent/NL6505716A/xx
Priority to DK234665A priority patent/DK117438B/en
Priority to ES0312769A priority patent/ES312769A1/en
Priority to CH649065A priority patent/CH445643A/en
Priority to AT422165A priority patent/AT263078B/en
Priority to BE663694A priority patent/BE663694A/xx
Priority to SE609565A priority patent/SE302334B/xx
Priority to DE19651285625 priority patent/DE1285625C2/en
Priority to FR16615A priority patent/FR1432460A/en
Publication of GB1072703A publication Critical patent/GB1072703A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0744Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
    • H01L27/075Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor
    • H01L27/0755Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • H01L27/0761Vertical bipolar transistor in combination with diodes only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0641Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
    • H01L27/0647Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
    • H01L27/0652Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Weting (AREA)
  • Recrystallisation Techniques (AREA)
  • Bipolar Transistors (AREA)
  • Pressure Sensors (AREA)

Abstract

1,072,703. Semi-conductor devices. MULLARD Ltd. May 12, 1964, No. 19744/64. Heading H1K. A method of manufacturing a semi-conductor body comprises forming a cavity in an initial semi-conductor body, at least the final step in forming the cavity being a chemical etching step, and epitaxially depositing semi-conductor material in the cavity to form a junction. The junction may be of the PN, PP+, or NN+ type and/or may be a heterojunction. As shown, Fig. 2, a wafer 1 of P-type silicon has a shallow cavity 3 and a deeper main cavity 2 etched in one face in two separate etching steps using masks formed by etching windows in oxide layers using a photo-resist technique. Shallower cavity 3 has a depth equal to the maximum desired tolerance for cavity 2. The depths of the cavities are measured, the remaining oxide layer is removed and the wafer is prepared by degreasing, boiling in nitric acid, removing the resultant oxide coating in hydrogen fluoride vapour and briefly etching in a mixture of hydrofluoric and nitric acids. The wafer is placed in a furnace in an atmosphere of hydrogen into which is introduced silicon tetrachloride and phosphorus trichloride to grow an N-type epitaxial layer 5 on body 1 to a depth slightly greater than that of cavity 2. The epitaxial layer is polished to line 7 this being determined by using a staining etchant which produces visible differentiation between P and N-type materials. As shown, Fig. 4, a diode is produced from the resultant wafer by growing a layer of oxide on the surface, removing this layer on the lower face of the wafer and forming a window over cavity 2 filled with epitaxial material. The wafer is alloyed to a strip or header 10 made of " Kovar" (Registered Trade Mark) coated with, or with the interposition of a foil of, gold which may contain boron. Gold-antimony alloy 13 is applied through the window and is alloyed to the epitaxial layer. An aluminium contact 14 is evaporated on to the surface of the wafer and may be thickened by electrodepositing material on to it. Alternatively a wire can be connected to alloy 13 by thermo-compression bonding. A transistor, Fig. 5 (not shown), may be manufactured from an N-type wafer in which a shallow cavity is filled with P-type epitaxial material doped with boron, polished to the required level determined by measuring the sheet resistivity of the epitaxial material in the cavity or in a monitoring cavity with a larger area, and producing an emitter region by diffusion, alloying or epitaxial deposition. Ohmic contacts can be made to P- and N-type materials simultaneously by diffusing phosphorus into the surface of the N-type region, evaporating aluminium on to the surface and alloying. The compositions of suitable etchants for the various operations are described. The invention may be used to produce other circuit elements such as resistors and capacitors in integrated circuits.
GB1974464A 1964-05-12 1964-05-12 Improvements in and relating to methods of manufacturing semiconductor bodies Expired GB1072703A (en)

Priority Applications (10)

Application Number Priority Date Filing Date Title
GB1974464A GB1072703A (en) 1964-05-12 1964-05-12 Improvements in and relating to methods of manufacturing semiconductor bodies
NL6505716A NL6505716A (en) 1964-05-12 1965-05-05
DK234665A DK117438B (en) 1964-05-12 1965-05-08 Method for manufacturing a semiconductor device with a semiconductor body and semiconductor elements.
ES0312769A ES312769A1 (en) 1964-05-12 1965-05-10 Improvements in and relating to methods of manufacturing semiconductor bodies
CH649065A CH445643A (en) 1964-05-12 1965-05-10 Method of manufacturing semiconductor devices
AT422165A AT263078B (en) 1964-05-12 1965-05-10 Method of manufacturing semiconductor devices
BE663694A BE663694A (en) 1964-05-12 1965-05-10
SE609565A SE302334B (en) 1964-05-12 1965-05-10
DE19651285625 DE1285625C2 (en) 1964-05-12 1965-05-10 METHOD FOR MANUFACTURING A SEMICONDUCTOR COMPONENT
FR16615A FR1432460A (en) 1964-05-12 1965-05-11 Semiconductor device manufacturing process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1974464A GB1072703A (en) 1964-05-12 1964-05-12 Improvements in and relating to methods of manufacturing semiconductor bodies

Publications (1)

Publication Number Publication Date
GB1072703A true GB1072703A (en) 1967-06-21

Family

ID=10134485

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1974464A Expired GB1072703A (en) 1964-05-12 1964-05-12 Improvements in and relating to methods of manufacturing semiconductor bodies

Country Status (9)

Country Link
AT (1) AT263078B (en)
BE (1) BE663694A (en)
CH (1) CH445643A (en)
DE (1) DE1285625C2 (en)
DK (1) DK117438B (en)
ES (1) ES312769A1 (en)
GB (1) GB1072703A (en)
NL (1) NL6505716A (en)
SE (1) SE302334B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7772097B2 (en) 2007-11-05 2010-08-10 Asm America, Inc. Methods of selectively depositing silicon-containing films

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1071843B (en) * 1957-02-07 1959-12-24
NL242039A (en) * 1958-09-30

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7772097B2 (en) 2007-11-05 2010-08-10 Asm America, Inc. Methods of selectively depositing silicon-containing films

Also Published As

Publication number Publication date
AT263078B (en) 1968-07-10
ES312769A1 (en) 1966-02-16
CH445643A (en) 1967-10-31
NL6505716A (en) 1965-11-15
DE1285625C2 (en) 1974-12-05
DK117438B (en) 1970-04-27
DE1285625B (en) 1974-12-05
SE302334B (en) 1968-07-15
BE663694A (en) 1965-11-10

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