GB1043358A - Control system for digital computer - Google Patents
Control system for digital computerInfo
- Publication number
- GB1043358A GB1043358A GB1268962A GB1268962A GB1043358A GB 1043358 A GB1043358 A GB 1043358A GB 1268962 A GB1268962 A GB 1268962A GB 1268962 A GB1268962 A GB 1268962A GB 1043358 A GB1043358 A GB 1043358A
- Authority
- GB
- United Kingdom
- Prior art keywords
- flop
- flip
- data
- repetition
- repetitions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003252 repetitive effect Effects 0.000 abstract 3
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
Abstract
1,043,358. Electric digital calculators. HITACHI Ltd. March 29, 1963 [April 2, 1962], No. 12689/63. Heading G4A. In a digital computer, an instruction word has a bit specifying whether or not a repetitive operation is to be performed, and if it is data addresses are modified after each repetition until the required number of repetitions as specified by a register have been performed, the register also indicating spacing of successive data items. Fig. 6 (not shown), shows a circuit for producing a " repetitive operation incomplete " signal. The instruction word bit mentioned above is gated to a first flip-flop and sets it if a repetitive operation is required. After each repetition, a count field (incremented by one after each repetition) and the number of repetitions required are subtracted, and if the first flip-flop is set, a zero result from the subtraction sets a second flip-flop which allows the first flip-flop to be reset. Generalized arithmetic operation, conditional jump (including associative table look-up) and data transfer instructions as above are described in the Specification with capabilities to successively modify addresses within the instruction words using indexing quantities in registers selected by fields within the words. One instruction enables a succession of stored data items to be tested against a selected condition and the results of the tests stored. The count field and number of repetitions required are stored in respective registers which also store quantities used in determining the spacing in memory between successive items of data to be operated upon.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1260162 | 1962-04-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1043358A true GB1043358A (en) | 1966-09-21 |
Family
ID=11809859
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1268962A Expired GB1043358A (en) | 1962-04-02 | 1963-03-29 | Control system for digital computer |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE1449540B2 (en) |
GB (1) | GB1043358A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2163279A (en) * | 1984-08-15 | 1986-02-19 | Tektronix Inc | Loop control system for digital processing apparatus |
GB2187577A (en) * | 1986-03-07 | 1987-09-09 | Stc Plc | Sequence controller for digital computer systems |
US4958275A (en) * | 1987-01-12 | 1990-09-18 | Oki Electric Industry Co., Ltd. | Instruction decoder for a variable byte processor |
WO2007133893A1 (en) * | 2006-05-10 | 2007-11-22 | Qualcomm Incorporated | Encoding hardware end loop information onto an instruction |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4975835A (en) * | 1987-10-30 | 1990-12-04 | Casio Computer Co., Ltd. | Variable length data processing apparatus for consecutively processing variable-length data responsive to one instruction |
-
1963
- 1963-03-29 GB GB1268962A patent/GB1043358A/en not_active Expired
- 1963-04-02 DE DE19631449540 patent/DE1449540B2/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2163279A (en) * | 1984-08-15 | 1986-02-19 | Tektronix Inc | Loop control system for digital processing apparatus |
GB2187577A (en) * | 1986-03-07 | 1987-09-09 | Stc Plc | Sequence controller for digital computer systems |
GB2187577B (en) * | 1986-03-07 | 1989-11-15 | Stc Plc | Digital computer systems |
US4958275A (en) * | 1987-01-12 | 1990-09-18 | Oki Electric Industry Co., Ltd. | Instruction decoder for a variable byte processor |
WO2007133893A1 (en) * | 2006-05-10 | 2007-11-22 | Qualcomm Incorporated | Encoding hardware end loop information onto an instruction |
Also Published As
Publication number | Publication date |
---|---|
DE1449540A1 (en) | 1969-01-30 |
DE1449540B2 (en) | 1970-10-01 |
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